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MIPI CSI2 rev 2.0 transmitter/controller for FPGA, with 8 lanes and 2.5Gbps per lane
What Designers Need to Know About USB Low-Power States
By Saleem Mohammad, Shivakumar Chonnad, Morten Christiansen (Synopsys)
In addition to performance and interoperability, achieving low power has been one of the requirements for industry standards specifications. Some of the key specifications like Universal Serial Bus (USB), PCI Express (PCIe), and MIPI have defined power saving features for burst traffic. This whitepaper explains how Synopsys USB IP offers low power using various low power states that go beyond the basic features. The USB 1.1 and USB 2.0 specifications support Suspend and Resume. Link Power Management (LPM) directed Suspend and fast Resume were added to USB 2.0 later. The USB 3.0 Super Speed specification supports U1 and U2 power states and U3 Suspend. All power states have seamless enter/exit while maintaining performance. U1, U2 and U3 states are also included in the USB 3.1 and USB 3.2 specifications. In USB4, the individual adapters maintain their respective low-power states, allowing the USB4 transport to enter the low-power CL1 or CL2 state during transfers and CLd state when the router enters sleep mode.
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