Multi Protocol IO Concentrator (RDC) IP Core for Safe and Secure Ethernet Network
Achieving Unprecedented Power Savings with Analog ML
By Tom Doyle, Aspinitiy
EETimes (January 12, 2023)
The rise of machine learning (ML) has enabled an entirely new class of use cases and applications. Specifically, edge computing and on-edge ML have augmented traditional devices with the ability to monitor, analyze and automate daily tasks.
Despite these advances, a major challenge remains: How do you balance the high-power demands of these ML applications with the low-power requirements of standalone, battery-powered devices? For these applications, traditional digital electronics are no longer the best option. Analog computing has emerged as the obvious choice to achieve ultra-low-power ML on the edge.
With the advent of on-edge ML, the industry has seen a proliferation of smart devices that respond to stimuli in the environment. Many households today, for example, host a virtual assistant like Amazon Alexa or Google Home that listens for a keyword before performing a task. Other examples include security cameras that monitor for movement in a frame and, on the industrial side, sensors that detect anomalies in the performance of an industrial machine.
E-mail This Article | Printer-Friendly Page |
|
Related Articles
- BCD Technology: A Unified Approach to Analog, Digital, and Power Design
- Achieving Your Low Power Goals with Synopsys Ultra Low Leakage IO
- Analog and Power Management Trends in ASIC and SoC Designs
- SamurAI: a 1.7MOPS-36GOPS Adaptive Versatile IoT Node with 15,000x Peak-to- Idle Power Reduction, 207ns Wake-up Time and 1.3TOPS/W ML Efficiency
- Achieving Low power with Active Clock Gating for IoT in IPs