Software radio closes in on handsets

There are several possible solutions. At one extreme is the "brute-force" approach, where two complete signal chains, one for each air interface, are forced into a single handset and come together only at the user interface. At the other extreme is the software-defined radio (SDR) approach, where a common hardware platform uses software to determine which type of signal is being processed and then does that processing.

Recent advances in enabling technologies for SDR open the doors primarily for basestation applications, although handheld solutions are following. However, projecte d benefits of reconfigurable solutions are still offset by high cost and high power consumption. Looking into SDR realities, the major obstacle to the broader adoption in the wireless industry is prohibitive cost.

Computational requirements for basestations are growing drastically with each new generation of wireless standards. While demand for higher performance is a constant, the same criteria (for example, power, cost and board space) are used to evaluate the merit of the design, usually normalized per channel.

Basestation design consists of the usual building blocks: radio, converters, baseband processing and control. Partitioning of these functions depends on the wireless standard. For 2/2.5G systems, the typical architecture consists of a multichannel front end, wideband RF and converters, followed by digital receive/transmit processors and a DSP. With the higher processing demands imposed by 3G systems, the baseband processing could be implemented with a variety of technologies. These range from ASIC, FPGA, a combination of DSP and FPGA, and different forms of programmable application-specific standard products all the way to fully programmable DSPs. The differences among them are in cost per channel, power efficiency, development time, flexibility and ease of programming verification, ultimately resulting in different costs. In addition to high computational capability, a software-based solution should have sufficient memory and I/O bandwidth and should be able to work seamlessly in a multiprocessor environment.

Now that suitable DSPs are available, software-defined 3G basestations will appear on the market. The ADSP-TS201 processor, one member of the TigerSharc family, is the first open-market DSP with the resources to efficiently implement the entire 3G baseband physical-layer protocol stack, including path search, despreading and decoding, with a purely instruction-based approach. This is accomplished two ways: by enhancing the parallelism of traditional instructions and by de fining a suite of specialized instructions. The flexibility of the instruction-based solution can manifest itself at a number of levels: flexibility for multiple air interfaces, dynamic reconfiguration to provide load balancing and possible choices in bit precision within the same subroutine.

In a traditional approach an ASIC or FPGA is used for chip-rate processing. In the case of a mixture of voice (high chip rate, low symbol rate) and data channels (lower chip rate, high symbol rate), the traditional approach is designed for the worst-case scenario as a hard-partitioned system. But a software-based solution can dynamically shift the processing load. Further advantages of using a programmable DSP in a basestation extend to flexible scheduling, despreading capability, efficient distribution across multiple chips and support of advanced receiver techniques such as multiuser detectors, interference cancellation and multiple antennas.

Now that the technology has been proved for SDR in cellular basestations, it should be a simple matter to shift this technology to the cellular handset. There are two major differences, however, between components for handsets and basestations: cost and power.

Basestations are less constrained by cost and power than handsets. If it takes a DSP with many hundreds of Mips of processing speed (or a cluster of interconnected processors, with aggregate speed in the billions-of-instructions/second range, for SDR), then the cost of the components can easily be offset by the ease of reconfigurability in contrast to hardwired ASIC-based designs. And even though the power per channel is often lower for a software-based design than one based on ASICs or FPGAs, both approaches are based on the assumption that line power is available, making low power an incremental value feature rather than a "must-have."

Yet, cellular terminals are among the most demanding applications in electronics when it comes to power and cost constraints. Handsets achieve standby times in the range of 300 hours and talk times on the order of three hours, using small enough batteries to fit in the tiny form factors consumers demand.

Moving to multimode SDR technology in handsets is a daunting challenge, but progress is being made steadily. The power constraints are probably the biggest challenge, since the processing speed needed for building a dual-mode terminal using GSM/wideband code-division multiple access (W-CDMA) is already available, but at too high a power level for a portable device.

The practical intermediate steps between a brute-force dual-signal-chain approach and a full-blown SDR handset will use programmed hardware blocks and an evolution of the digital baseband processor to true SDR technology. Among the hardware blocks needed are the RF and mixed-signal sections. Because the RF bands for GSM/Global Packet Radio Service (GPRS) and 3G/W-CDMA are different among most regions of the world, multiband radios are needed. And because handoffs between networks will be needed, it is necessary to provide a smooth way to handle those transitions. Further complicating the radio problem is the fact that the 3G standards require linear power amplifiers and operate full-duplex (simultaneous transmit and receive), in contrast to the relaxed linearity requirements and time-domain duplex operation in GSM and GPRS. Dual-mode radios and power amplifiers have been demonstrated and the major implementation problems have largely been solved: The technology choices are direct-conversion radios and linearized power amplifiers.

Similarly, the 25x difference in signal bandwidth between W-CDMA and GSM/ GPRS complicates the design of the mixed-signal section, specifically the baseband A/D and D/A converters and their associated filtering. As in the radio section, solutions using programmable hardware have been demonstrated and the technology problems are well-understood.

The digital baseband platform has emerged as the key component of the wireless handset with the highest deg ree of programmability. Depending on different terminal architectures and level of integration, the digital baseband encompasses a complete set of baseband processing functionality and typically relies on multicore platforms, including DSP and microcontroller cores, as well as dedicated hardware functionality (accelerators, coprocessors, etc.) for a given wireless standard and relatively large amounts of internal memory.

Depending on the amount of processing available in the DSP, there are many functions that are executed in software. Over time, functions of older standards tend to migrate from dedicated hardware blocks into the DSP. On the other hand, new high-complexity functions tend to require dedicated hardware, such as chip-rate processing (for example, a Rake receiver), cell search, path-search algorithms and turbo decoding, to name a few.

So the first steps toward multimode 3G handsets using SDR are being made. Time will tell if the proponents of SDR technology are as visionary as the original framers of the GSM standard.

Jose Fridman is a systems engineer; Doug Grant the director of business development, RF and wireless; and Zoran Zvonar a senior systems engineer at Analog Devices Inc. (Norwood, Mass.).

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