Build Complex ASICs Without ASIC Design Expertise, Expensive Tools - Take advantage of an architecture comparable to your original FPGA prototype design by migrating to a structured ASIC
ED Online ID #7382
March 1, 2004
To implement custom digital logic for system-level prototyping and qualification, OEM system designers have switched from costlier FPGAs to ASICs. However, the only ASIC option was a cell-based version. Recently, though, structured ASICs arrived as an alternative. The combination of nearly cell-based density, speed, and power consumption, coupled with low nonrecurring engineering costs, short turnaround time, and compatibility, along with existing low-cost design tools, have made structured ASICs the logical choice for applications not demanding bleeding-edge performance.
Click here to read more ....
Related Articles
- How to build reliable FPGA memory interface controllers without writing your own RTL code!
- Structured ASICs take FPGA prototypes into volume production
- Asynchronous reset synchronization and distribution - ASICs and FPGAs
- Single event effects (SEEs) in FPGAs, ASICs, and processors, part I: impact and analysis
- Two methodologies for ASIC conversion
New Articles
Most Popular
E-mail This Article | Printer-Friendly Page |