Since analog circuits refuse to obey Moore's Law, logic designers are taking matters into their own hands to take full advantage of CMOS process shrinks. By replacing analog functions with digital equivalents, you can achieve more predictable performance, simplify testing and reduce chip area — even when the digital equivalents use far more transistors than the analog versions.
This digitalization of analog is not just about using digital signal processors (DSPs) to implement complex analog functions; in fact, the big idea today is to digitalize relatively simple analog functions.
A digital hysteresis circuit provides an excellent example of this technique because it turned an otherwise impossible customer request into a cost-effective product that is in production today. Analog conventional wisdom would have resulted in an analog block that had to be so large to get reasonable yields that the overall chip was prohibitively expensive. Rethinking the application from a digital viewpoint halved the circuit size and made the product viable.
This kind of success encourages a new way of thinking about analog functions. With the cost of digital transistors declining to nearly zero in SoCs, the trade-off between analog and digital implementations has changed dramatically in favor of digital.
Now, you can replace an analog circuit with a more complex but mostly digital version and come out ahead. This disruptive technology shift has already happened, but few analog designers understand it. The following example of digital hysteresis shows the implications.
What's old is new again
There is nothing new about digital hysteresis, of course. The innovation is to use the digital version even when the application seems to require analog.
Circuit designers, analog or digital, normally think of hysteresis as an analog function: By analogy with mechanical systems, the threshold point for movement in one direction is different from the threshold point for movement in the other direction. Hysteresis is the gap between the two thresholds.
Mechanical engineers work hard to minimize hysteresis, but you need some amount of it to ensure stability in any system that includes feedback. Analog designers are thus used to the idea of designing in hysteresis. Digital designers do not tend to think about hysteresis unless they need to control an analog/mechanical subsystem that must be kept from dithering around a single set point.
In this case, the customer's SoC application involved multiple analog signals that had to be debounced. Rather than make a smooth transition from one voltage to another, these signals ramped up and then chattered up and down between voltages. The analog designer responsible for this part of the application knew he could use hysteresis to filter out the chatter. The designer created the obvious solution, that being an analog circuit that responded immediately to an initial low-to-high voltage transition but did not respond immediately if the voltage bounced for intervals on the order of 10 to 20 microseconds.
This circuit worked well in simulation and required only 14 analog transistors, but the matching resistors required by the circuit posed fabrication problems. When these resistors were made physically large enough to achieve adequate matching, the die became so big that the SoC would no longer be economically viable. The product was dead.
Digital to the rescue
Fortunately, some digital designers heard the analog designers talking about this product that could not be built and proposed a solution. An initial input transition resets all the flip-flops so that the circuit's output changes immediately. Simultaneously, a 32-kHz clock begins clocking the input transition through the string of flops. Feedback prevents the circuit's output from changing state until the initial input transition has cascaded through the flops. The clock frequency and the number of flops thus determine the amount of hysteresis in the circuit.
When working with a single analog input comparator, this digital hysteresis circuit behaved precisely the same as the analog hysteresis circuit. To the analog designer, however, the digital version had a fatal flaw: It required about 1,000 transistors, in contrast to the 14 in the analog version.
As it turned out, the digital version took far less silicon area than the analog circuit. The digital transistors are much smaller, and the large matching resistors are gone. The SoC thus became a viable product.
In addition to reducing the chip area, the digital hysteresis circuit offers more predictable performance because its behavior does not change with temperature or process-related tolerances. Similarly, testing the digital version is easier because the test equipment does not have to account for all the ways in which the analog version should work correctly and could go wrong. Built-in self-test was not an option with the original analog version.
For all those reasons, many more analog functions must go digital. This shift has been under way for many years, with examples such as class-D amplifiers, delta-sigma converters and programmable I/Os in FPGAs. Some analog functions will successfully resist this trend; the example of the current-steering D/A converter shows that large analog transistor counts can work well when the transistors are used in a dense "digital" fashion. For many other analog functions, the digitalization trend will continue until the analog portion has been reduced to no more than a few transistors.
Richard Tobias is vice president and Harry Peterson is director of design engineering at the ASIC and foundry business unit of Toshiba America Electronic Components Inc.