Several companies, notably fabless ones, are promoting all-CMOS system-on-chip (SoC) solutions to RF applications. While certain applications, notably lower-performance ones, can now utilize SoC solutions, these are unlikely to be optimum solutions.
At process geometries of 0.18 and 0.12 micron, CMOS transistors have respectable RF performance with regard to intrinsic speed and fT, even though their effective gain bandwidth is still not as good as bipolar devices. This means it is already possible to produce single-chip (RF + baseband) solutions for less-critical applications below 2.5 GHz, such as Bluetooth and Zigbee, where RF performance requirements are fairly relaxed and the baseband functionality occupies a relatively small area of silicon.
For more-demanding applications, RF CMOS starts to look attractive at the 90-nanometer technology node. This means that for operating frequencies up to about 6 GHz, you can expect to see RF CMOS solutions beginning to compete with current BiCMOS ones. But in parts of the system RF CMOS will still have difficulty meeting performance requirements.
Low-noise amplifiers, RF power amps, antenna switches and baluns are typical examples that may require implementation in technologies like silicon BiCMOS, silicon germanium or gallium arsenide. The key to bringing the different parts together to create highly integrated plug-and-play total-system solutions will therefore lie in system-in-package (SiP) technology rather than SoC technology.
SiP technology lets each part of an RF system be fabricated as a separate die in the optimum process technology, and then allows all of these separate dice to be housed in a single IC-sized package. The key to meeting the necessary price/performance ratios therefore lies in the ability to optimally partition and implement each part of the system, together with the ability to integrate the parts and achieve the required packaging density.
Clearly, it is best to integrate the baseband digital signal processing and microcontroller in a baseline CMOS process. This part can then migrate from one CMOS technology node to the next as soon as new nodes move into volume production, thereby leveraging the cost or performance advantages of smaller-geometry processes. This migration is also well-supported by EDA tools and intellectual-property libraries, which minimizes the associated risk.
For transmit and receive chains currently now dominated by BiCMOS solutions, there will probably be a shift to RF CMOS in an increasing number of applications. But the development of passive-component integration technologies for low-cost CMOS processes must accompany this shift to RF CMOS. Clearly, companies that already have transferable passive integration capabilities in BiCMOS have a head start in this direction.
The passive components integrated into RF CMOS chips should be only those that need to be there for RF performance reasons. For less-critical components, there are cheaper silicon solutions. New integration technologies have recently been developed that create passive components on bare silicon wafers rather than more expensive processed (e.g., BiCMOS or CMOS) wafers.
Pieter Hooijmans (email@example.com) is vice president and RF program manager for the Communications Business unit of Philips Semiconductors (Eindhoven, Netherlands).
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