RISC-V-based AI IP development for enhanced training and inference
D&R Industry Articles (July 2008)
Articles for the Week of July 28, 2008
DesignTag: A Thermally Sensed Security Tag to Protect Chip Designs
This paper introduces a novel "security tag" technology for detecting misuse of semiconductor intellectual property, in the form of a small circuit which is added to the chip design.- How to interface FPGAs to microcontrollers
- Surveying the hardware-assisted verification landscape
- Boost verification accuracy with low-power assertions
- Prototyping with the Spartan-3A DSP starter platform
Articles for the Week of July 21, 2008
Low Power Asynchronous Processor With Cordic Co-Processor
This paper describes the architectural design of RISC based asynchronous microprocessor as an alternative to clocked design.- Interactive C-code cleaning tool supports multiprocessor SoC design
- How to give crime-fighters a flexible, high-performance edge with programmable logic
- Debugging with Cortex-M3 Microcontrollers
- Debugging multiprocessor code
- PCI Express goes everywhere
Articles for the Week of July 14, 2008
Validation Approaches for a Product Family
This paper briefly discusses the approaches for Validation Environment and Test methodologies adopted for 8-bit microcontroller family based products. The aim of this paper is to raise the awareness for specific advantages/disadvantages, the time saving features and also the amount of reuse facilitated by the approach.- A configurable FPGA-based multi-channel high-definition Video Processing Platform
- How to select an AES solution
- Achieve PCIe compliance and interoperability in your IP core-based design
Articles for the Week of July 7, 2008
SPIRIT IP-XACT Controlled ESL Design Tool Applied to a Network-on-Chip Platform
The purpose of this paper is to evaluate the benefits of an IP-XACT based environment applied to Network-on-Chip design. We show the level of automation achieved in the design flow, discuss its efficiency for the design and verification steps, and propose improvements.- How to simplify power design development and evaluation for FPGA-based systems
- ESL handoff: closer than you think
- Leveraging OCP for Cache Coherent Traffic Within an Embedded Multi-core Cluster
Articles for the Week of June 30, 2008
Additional Articles- FPGA Implementation of DLX Microprocessor With WISHBONE SoC Bus
- Reducing system complexity by using a single-supply logic-level shifter