Quantum-Driven Hardware Root-of-Trust - Physical Unclonable Function (PUF)
D&R Industry Articles (December 2011)
Articles for the Week of December 26, 2011
Automating Design Rule Waivers in SoC IP Reuse
This paper describes an automated waiver processing methodology and implementation that is accurate and efficient, and can significantly reduce debug tasks and time. The proposed method includes all waiver types commonly encountered, and provides designers and verification teams a degree of customizable control to waive an error only under certain contexts and constraints, which can vary for different errors, designs, or IP.Articles for the Week of December 19, 2011
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Automated Architecture Checking of UML Based SoC Specifications
This paper documents work that has been carried out to automate the checking of system software architecture specifications of SoCs. Checking the architecture manually can be time consuming and prone to error. This is especially true on architectures that are large and complex. To achieve automation the architecture specification methodology is first represented as UML meta-models to highlight associations that can be checked. These are then analyzed to determine the checks to be carried out. The analysis indicated the checks relating to constructional, completeness, consistency and connectivity could be achieved.- Understanding Skew in 100GBASE-R4 applications
- Single event effects (SEEs) in FPGAs, ASICs, and processors, part I: impact and analysis
- Taking advantage of the Cortex-M3's pre-emptive context switches
- Keeping time on 40/100G networks with high-performance clocks
- Top 10 Tips for Success with Formal Analysis - Part 1
Articles for the Week of December 5, 2011
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