128-bit Public Key Accelerator
PCIe 6.0 PHY in Samsung (SF5A, SF4X, SF2)
12-bit, 2 GSPS High Performance ADC in 16nm CMOS
25Gbps Ethernet and CPRI-10 FEC Layer IP Core
Qualitas Semiconductor's MIPI D-PHY IP Powers Mass Production of Renesas AI MPU
YorChip and Digitho developing breakthrough 2D Chiplet Packaging for Mass Markets
Comcores Announces Availability of its Ultra-Compact Ethernet TSN End Station Controller IP for Automotive Networks
The Ideal Crypto Coprocessor with Root of Trust to Support Customer Complete Full Chip Evaluation: PUFcc gained SESIP and PSA Certified™ Level 3 RoT Component Certification
Advanced Packaging and Chiplets Can Be for Everyone
Timing Optimization Technique Using Useful Skew in 5nm Technology Node
HDT Bluetooth: the Next Step in High Quality Audio Streaming
The Future of Technology: Transforming Industrial IoT with Edge AI and AR
RISC-V Processor Design - Free YouTube Course by Maven Silicon
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