STMicroelectronics


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STMicroelectronics

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Formal property verification: A tale of two methods	Jan. 22, 2018

How formal verification saves time in digital IP design	Nov. 23, 2015

Reuse UVM RTL verification tests for gate level simulation	Oct. 05, 2015

Distribution: An approach for Virtual Platform scalability	Feb. 02, 2015

IP Exchange Through Handoff for Easy System-On-Chip Design	Apr. 14, 2014

A design methodology using Power-Grid Prototyping to optimize Area Performance of SoCs	Jan. 27, 2014

Formal, simulation, and AMBA verification IP combine to verify configurable powerline networking SoC	Dec. 03, 2013

An efficient approach to evaluate Dynamic and Static voltage-drop on a multi-million transistor SoC design	Sep. 16, 2013

Optimizing clock tree distribution in SoCs with multiple clock sinks	Mar. 11, 2013

Enabling High Performance SoCs Through Multi-Die Re-use	Apr. 16, 2012

Automated Architecture Checking of UML Based SoC Specifications	Dec. 12, 2011

A UML Representation of a Passive Standby Power Management Architecture for Set-Top Boxes	Jul. 25, 2011

STAC: Advanced inter-die communication Technology	May. 16, 2011

An IP-XACT Deployment Case: IZARN IP	Apr. 25, 2011

Initial Investigations into UML Based Architectural Reference Patterns for Set-Top Boxes	Mar. 08, 2010

Customizable SoC SPEAr from STMicroelectronics Solving Time to Market Issues	Oct. 05, 2009

A Cost-Optimized Set-Top Box Architecture	Aug. 10, 2009

Embedded Software Architecture Specification Developments in Support of SoC Design and Re-use	Jun. 29, 2009

Generic and Automatic Specman based Verification Environment for Image Signal Processing IPs	Jun. 15, 2009

From IP re-use to open Innovation - A new trend in the industry	Jun. 01, 2009

A Re-Usable Level 2 Cache Architecture	May. 25, 2009

SOC Virtual Prototyping: An Approach towards fast System-On-Chip Solution	Apr. 13, 2009

A SystemC/TLM based methodology for IP development and FPGA prototyping	Nov. 03, 2008

Use Pre-Configured Device Drivers (PCD) to reduce embedded system memory footprint	Oct. 23, 2008

Performance Verification Methods Developed for an HDTV SoC Integrating a Mixed Circuit-Switched / NoC Interconnect (STBus/VSTNoC)	Sep. 15, 2008

An HDTV SoC Based on a Mixed Circuit-Switched / NoC Interconnect Architecture (STBus/VSTNoC)	Sep. 08, 2008

Building a multi-voltage, high performance, ultra low standby power 32-bit MCU	Aug. 28, 2008

ESD and EMI hazards in mobile phones--Solutions for the audio system connector	Jun. 19, 2008