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CPU Soft IP for FPGAs Delivers HDL Optimization and Supply Chain Integrity	Sep. 27, 2018

How flash-based FPGAs simplify functional safety requirements	Jun. 20, 2018

How FPGA technology is evolving to meet new mid-range system requirements	May. 09, 2018

Secure updates for FPGA-based systems	Dec. 14, 2015

An Oversampling Technique for Serial Protocols	Oct. 10, 2013

Using mixed-signal FPGAs to take motion control to the next step	Dec. 13, 2010

Enable low power design with FPGAs	Nov. 05, 2009

Programmability in portable design: the five modes of motivation	Jun. 04, 2009

PRODUCT HOW-TO: Bringing programmability to portable design	Feb. 27, 2009

Power-aware FPGA design (Part 3)	Feb. 19, 2009

Power-aware FPGA design (Part 2)	Feb. 12, 2009

Power-aware FPGA design (Part 1)	Feb. 05, 2009

Achieve higher accuracy using mixed-signal FPGA calibration	Dec. 08, 2008

How to analyze and reduce power using Libero IDE	Aug. 14, 2008

Lower the cost of intelligent power control with FPGAs	Dec. 17, 2007

KNOW THE ISSUES: Applying FPGAs in system-critical automotive electronics	Dec. 17, 2007

Low-power portable product design with FPGAs	Oct. 11, 2007

Using FPGAs for advanced collision avoidance systems	Oct. 08, 2007

How to use FPGAs for quadrature encoder-based motor control applications	Sep. 13, 2007

Mixed-signal FPGAs provide GREEN POWER	Jul. 02, 2007

How to design and verify mixed-signal FPGAs	Oct. 05, 2006

Bringing ARM7(TM) to the Masses	Oct. 27, 2005

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