At the most advanced nodes, semiconductor innovation is driven less by individual breakthroughs and more by the efficient application of process technology.
That efficiency increasingly depends on process design kits (PDKs) — the critical interface where foundry technology, EDA tools, and customer outcomes converge.
This is precisely where the Synopsys–Intel Foundry collaboration is most focused.
As Intel Foundry pushes into the Angstrom era — marking a shift beyond nanometer‑class scaling toward near‑atomic dimensions — with process nodes such as Intel 18A and Intel 14A, the role of PDKs has expanded from basic enablement to full‑stack orchestration of design, analysis, and manufacturing readiness.
“A PDK is essentially the building block for the foundry and for the process technology,” says Jonathan Knudsen, senior principal engineer at Intel Foundry. “It’s all of the EDA components and collateral that enable customers to take their ideas from concept to silicon and ultimately to high‑volume manufacturing.”
Creating gateways to advanced nodes
Delivering a PDK at this level is not incremental work. Advanced nodes introduce features that fundamentally alter physical design assumptions — backside power delivery, new routing constraints, tighter thermal margins, and increasing coupling between process and performance.
“Anything that’s missing or incomplete leads to escapes, silicon churn, and redesign,” Knudsen says. “We can’t have any of that. Everything has to be rock solid.”
That rigor is why Intel Foundry and Synopsys work closely across the full EDA stack. PDKs developed jointly between the two companies integrate construction, timing, extraction, and signoff-grade multiphysics analysis, enabling customers to move from design to manufacturing with confidence.
“Synopsys partnering with us has enabled a very rich series of technology components,” Knudsen says. “Historically, having all of those pieces working together was a problem. That’s no longer the case.”