As manager of hardware development for the Graphics Competence Center at Fujitsu Semiconductor Europe, Raimund Soenning faces some tough challenges. He's responsible for the design and verification of complex graphics controller SoCs for automotive applications. His group develops graphics and video processing IP that can be used in many different configurations.
"With any graphic or data or video processing IP, you have a number of combinations of ways you can use the IP," Soenning said. "Verifying all these configurations together, along with timing on the interfaces, makes it hard for us." Even with the purchase of third-party IP, he said, there's still a need to do "integration verification."
Directed testing is not an efficient way to test many possible IP configurations. In a recent interview Soenning talked about how his group is transitioning to constrained-random test generation, what advantages it offers, and what the challenges are in adopting it.
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