Xilinx Inc. announced the industry’s first stacked silicon interconnect technology. It proposes to deliver breakthrough capacity, bandwidth and power savings using multiple FPGA die in a single package for applications that require high-transistor and logic density, as well as tremendous levels of computational and bandwidth performance.
3D packaging approach
L-R: Xilinx's Dave Myron, Suresh Ramalingam and Neeraj Varma discuss the first stacked silicon interconnect technology.
Xilinx has taken a 3D packaging approach that makes use of passive silicon-based interposers, microbumps and through-silicon vias (TSV) to deliver multi-die programmable platforms. As the interposer is passive, it does not dissipate any heat beyond what’s consumed by an FPGA die.
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