In my last post I briefly mentioned that when designing hardware with SystemC, you do not need to allocate logic to register boundaries. And I said that was a blog post for another day.
The first step is to separate the core functionality of the block from the way it interfaces to the system. So if you were designing an MPEG decoder, the decoding algorithm would be the core functionality. If it used AXI to communicate with the system, the AXI protocol would be the interface.
You can then describe the core using purely "untimed" SystemC. This is nice because you can focus on describing and verifying the algorithm itself, not worrying about how it will be implemented to meet the spec of a particular application. If you want to add some wait() statements to represent where you know you will need latency, that's fine. But you don't need to distribute them across logic, you can just stack them. That would be a "loosely-timed" model.
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