Industry Expert Blogs

Memory Built-In Self-Test (BIST) has existed for as long as there have been modern SoCs. With today’s advanced SoCs containing literally hundreds and even thousands of SRAM memories, clustered in many memory subsystems throughout the SoC, both memory BIST as well as Built-In-Self-Repair (BISR) technology are increasingly important to insure the highest possible yield. System-on-chip designs are tailored for the optimal power, performance, area (PPA) and cost for a specific target application. To meet these increasingly challenging goals, designers are implementing solutions using multiple power domains, allowing the memory to run at high speed while conserving power in the periphery. These factors, combined with the different types of memories, including high density and high speed; single port, multi-port, register files and ROMs add to the complex task of ensuring the SoC performs to specification, and doesn’t limit yield in high volume production.

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