Industry Expert Blogs

This week I’m turning my attention to the behind the scenes work that is done at Synopsys’ silicon characterization labs  in order to make certain our non-voltaile memory IP (NVM) passes the rigors of automotive requirements.

Developing a reliable embedded NVM technology starts with the architecture. Optimizing the bitcell, the programming algorithm, implementing error correction, etc. all play a critical part in designing an NVM array that will meet the reliability targets of the market. Architecting a reliable NVM is only the first step. Thorough silicon testing is required to demonstrate reliability. This level of testing requires a significant investment in equipment and expertise. The figure below shows the 3 step silicon testing strategy we use to demonstrate manufacturability (characterization), compliance to test standards (qualification), and long-term reliability.

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