Systems on chip (SoCs) are incredibly varied, extremely complex, and based on rapidly changing requirements and specifications, according to Martin Lund, senior vice president for R&D at the Cadence SoC Realization Group. At a keynote speech at the CDNLive Silicon Valley conference March 12, 2013, he noted that traditional approaches to "IP reuse" need to give way to IP that's optimized for the application requirements of the SoC.
Held in multiple locations throughout the year, CDNLive is the Cadence user conference. CDNLive Silicon Valley ran March 12-13, and it drew over 800 attendees for around 100 technical sessions. Keynote speeches were given by Lip-Bu Tan, Cadence president and CEO (blog post here); Young Sohn, president and chief strategy officer for device solutions at Samsung Electronics (blog post here); and Martin Lund.
SoCs are everywhere, Lund noted - smart TVs, self-driving cars, Google Glasses, and more - and all have different capabilities and requirements. At the same time, standards are changing frequently and are getting more complex. "My favorite is the PCIe Gen 3 spec with 860 pages, full of requirements that all have to work," Lund said. Add in the cost factors of verification and IP integration, and it's no wonder SoC development is "under stress."
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