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Programmable Memory BIST - A New Direction for Design for Test (DFT)Industry Insights Blog - Richard Goering , CadenceSep. 05, 2013 |
Memory built-in self test (MBIST) is a design for test (DFT) methodology that has been around for many years. But until now MBIST algorithms have generally been hardwired -- they can't be changed once the design has been built. A new methodology available in the Encounter Test 12.1 release, programmable MBIST, promises to give IC designers much more flexibility.
While programmable MBIST provides benefits at any process node, it is especially helpful at 28nm and below, and will be extremely valuable for upcoming FinFET technology nodes, according to Bassilios Petrakis, product marketing manager for Encounter Test. With sub-20nm complexity, he observed, "you want to be able to adapt the algorithm depending on the situation you have."
"For a new node and technology (transistor) structures, you don't always know what the failures are going to be, or what type of [test] algorithm is really optimized for the technology," said Patrick Gallagher, architect at Cadence. "You can go in with a set of canned algorithms, but if you're getting failures you can fine-tune those algorithms [with programmable MBIST] to something very specific for your technology and your memory design." This level of flexibility allows designers to adapt to the problem at hand.
