We at Arrow Devices are committed to help developers build fast and robust standard interface IP.
We have prepared the following actionable questionnaire and downloadable test plan for MIPI M-PHY v2.0 that lists more than 300 test cases. All it takes is to answer the questionnaire and cross-reference your verification plan with the test-plan provided. We hope that this questionnaire and test-plan helps in reducing the development risk of new designs and increase the robustness of existing designs, by ensuring that none of the key items are missed.
The verification questionaire and checklist have been prepared for the MIPI M-PHY Specification version 2.0. MIPI M-PHY requires its own verification strategy, which involves choosing the right combination of directed test cases and constrained random test cases. The following sections describe the verification strategy and focus areas.
We have divided the MIPI M-PHY verification problem into two broad categories: Functionality Verification and Interface Verification.
MIPI M-PHY functionality verification has following focus areas:
- M-Tx and M-Rx state machines
- 8b10b encoding/decoding
- Error injection scenarios
M-Tx and M-Rx state machines have saved, burst, and break states. Powers saving operations are performed in save state, data transmission occurs in burst states and special operations such have OMC and line configuration happens in break state.
- Are you verifying all the possible M-Tx and M-Rx state machine transitions?
- Have you verified 8b10b encoding/decoding corruption scenarios?
- Are you verifying M-PHY error injection cases?
- Are you verifying M-PHY illegal error injections cases?
- Are you verifying functionality such as OMC and line-config?
- Are you verifying the shadow and effective register updates?
- Are you verifying that PWM and NRZ encoding is done as per M-PHY specification?
Most of the M-Tx and M-Rx state machines state transition can be covered by constrained random tests. Some directed tests are also needed to cover hard to hit state transitions. Directed tests are also needed to cover error injection scenarios. Overall, a mix of constrained random and directed test cases is optimal for M-PHY functionality verification.
It has following focus areas of verification. One is Stack side Interface (RMMI) and other is Line interface (Serial Interface).
MIPI M-PHY Interfaces verification has following focus areas:
- Application side control Interface (RMMI Control Interface)
- Application side data Interface (RMMI Data Interface)
- Line interface (Serial Interface)
The RMMI signaling interface for a MODULE (M-TX or M-RX) consists of two independent interfaces, control interface for control service primitives and data interface for data transfer service primitives. The line interface is the differential pair serial interface.
- Are all attributes (capability, configuration and status) being accessed correctly on RMMI control interface?
- Are all configuration attributes being written correctly with or without InLnCfg on RMMI control interface?
- Are you covering all the possible speed configurations (modes, gears, etc...)?
- Is M-PHY RMMI data interface correctly handling all possible data sizes and symbol combinations (e.g. 1, 2, 3 or 4 symbols transmitted on a clock edge, for 40 bit data interface)? Are these combinations checked for 40, 20 as well as 10 bit data interface?
- Are you correctly modeling and checking the signal strength on serial line interface? Is DIF-Z and DIF-P correctly modeled?
- Are you verifying your DUT for both jitter and as well ppm effects on transmitted data?
- Are you performing required assertion checks (DIF-N for Tactivate, DIF-P for Tpwm_prepare, etc.) on the RMMI and Line interface?
Assertions are useful to check the protocol of the above MIPI M-PHY interfaces. In our experience, 150+ assertions are needed to cover all interface protocol checks.