Industry Expert Blogs

PCI Express (PCIe) has long been a dominant standard for communications inside of computers, servers and blades but sometimes you need to think (and send data) outside the box. Since the first release of PCIe cabling standard in early 2007, creative engineers have been looking to utilize this new capability as a box-to-box interconnect, in order to expand PCIe into high end networking applications.

Through the three versions of the PCIe specification two reference clock (Refclk) receiver (Rx) architectures were defined, the common Refclk Rx architecture (Figure. 1a) and the data clocked Rx architecture (Figure. 1b). The difference in the two architectures is the following: In the common Refclk Rx architecture the receiver uses the same reference clock in its Clock and Data Recovery (CDR) as the transmitter and thus the CDR is synchronous with the incoming data. In a data clocked Rx architecture the CDR uses only the edges of the incoming data in its CDR and the Rx CDR needs to track all the jitter on the incoming signal. However, these architectures pertain only to the receiver and in either Rx architecture it is expected that the associated transmitter is synchronous with a system reference clock.

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