During my illustrious career one of the most useful axioms that I use just about everyday day is: "Understand what people say but also understand why they are saying it." This certainly applies to press releases so let’s take a look at what Intel unleashed during #51DAC (in alphabetical order):
- ANSYS And Intel Collaborate To Deliver Power, EM And Reliability Sign-Off Reference Flow For Customers Of Intel Custom Foundry –
- Cadence and Intel Collaborate to Enable a 14nm Tri-gate Design Platform for Customers of Intel Custom Foundry –
- Mentor Graphics Tools Fully Enabled on Intel’s 14nm Processes for Customers of Intel Custom Foundry –
- Synopsys and Intel Collaborate to Enable 14-nm Tri-Gate Design Platform for Use by Customers of Intel Custom Foundry–
Building a fabless design ecosystem is a very difficult thing. TSMC has been doing it for 25 years which resulted in the Grand Alliance we have today. As the #1 pure-play foundry, ecosystem partners swarm TSMC. The big challenge is silicon validation which is what the TSMC OIP is all about. As the #1 consumer of EDA tools, Intel has a distinct advantage since they write some very big checks. Close to half a billion dollars a year I am told. Samsung is in a similar position, being one of ARM's biggest customers Samsung foundry definitely has the IP advantage. Samsung also writes some very big partner checks.
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