Now that my kids are back to school, things are calming down slightly. Well, ok, the chaos is shifting gears :) I’m still recovering from IDF last week, and I owe you all a blog post about that, but I’ve been remiss in advising you of how you too can get “back to school” … with an upcoming Webinar on challenges you’ll face in PCI Express 4.0 design.
This Tuesday (16-September) at 11am Pacific, I’ll be talking through some key things PCIe 4.0 designers will need to know. There’s been a lot of talk about the PHY and electrical side of the upcoming specification, so I’ll mostly be focused on the controller side.
Here’s a quick teaser on the topics:
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