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Industry Expert Blogs

Accelerating Memory Debug

VIP Experts Blog - Synopsys
Feb. 12, 2015

Following on his recent talk about Key Advantages of Synopsys Memory VIP Architecture, here Synopsys R&D Director Bernie DeLay talks about protocol-aware debug for memories: a single environment to simultaneously visualize transactions, state machines, and memory arrays

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Related Blogs

Key Advantages of Synopsys Memory VIP Architecture
Overcoming the Protocol Debug Challenge
Protocol Debug for Complex SoCs
Spec-based Coverage Closure with Synopsys VIP
SystemVerilog Protocol Compliance: Why Source-code Test Suites?

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