Industry Expert Blogs

Microamp-per-megahertz thinking served the microcontroller (MCU) community well for decades. As the focus shifts to connectivity and always-on use cases, bigger cores and wireless IP blocks push energy use in the wrong direction. Next-generation MCUs can ill afford to spend more energy just to manage themselves. Any mandatory software to make an MCU run usually frustrates customers considering design-ins. How does the MCU ecosystem manage energy moving forward?

From beginnings as register-oriented compute nuggets, MCUs grew bigger cores and wider data paths backed by higher resolution A/D and D/A peripherals. The “work hard, sleep harder” philosophy debuted. By waking up and performing computations as quickly as possible, then getting back to sleep, overall duty cycle is reduced and energy saved. A low duty cycle driven by software has its limits, however; it can cost more energy just to wake up and shut down a processor core than it takes to sample a sensor.

An “MCU-on-steroids” slims heterogeneous multicore architectures derived from mobile application processor designs, seeking a cost and power consumption profile MCU customers can accept. With more DMA-capable I/O cores in play, designers often turn to network-on-chip (NoC) IP, solving integration and multi-rate, multi-protocol challenges. NoC-based designs enable easier partitioning of interconnect logic into the MCU power architecture, greatly reducing the gate count in the “always on” portion of the design. A NoC-based approach also helps designers spin more MCU variants quickly.

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