One often overlooked network on a chip is the power supply network. While not as glamorous as the communication network, it still provides an essential function and therefore, requires careful design and analysis.
The EDA companies have invested in the development of tools to perform design and analysis of many of the aspects of the power supply network to make sure we get it right. These aspects include the following.
- Power rail analysis – the size and connections between metal layers are analyzed to determine if the current carrying capability is sufficient for the given load. Too large of an IR drop in the supply network can affect the interface levels or reduce the performance of the circuit.
- Decoupling capacitance analysis – the size and location of on chip decoupling capacitance are analyzed to minimize local supply noise, but too much capacitance increases leakage.
- EM analysis – the size and connections between metal layers are analyzed to determine if there are any reliability issues related to metal failure.
- EMI analysis – the size and placement of power rails with respect to fast switching signals such as a clock can prevent electromagnetic interference.
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