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Today, the advanced driver-assistance systems (ADAS) processor market is growing by more than 25% per year. This growth is driven by the migration of ADAS features – including automatic emergency braking, lane-changing assist, and adaptive cruise-control functions – from luxury vehicles to midrange and even entry-level vehicles. ADAS features will be almost universal by the middle of the next decade. In 2018, several manufacturers offered vehicles with self-driving platforms that delivered better-than-level-2 autonomy including GM’s Super Cruise, Mercedes-Benz’s Distronic Plus, Nissan’s ProPilot Assist, and Tesla’s Autopilot.

As mentioned in part 1 of this blog post, Achronix anticipates that the favored self-driving architecture of the future will be increasingly decentralized, but both the centralized and decentralized architectural design approaches will require hardware acceleration in the form of far more lookaside co-processing than is currently realized. Whether centralized or decentralized, the anticipated computing architectures for automated and autonomous driving systems will clearly be heterogeneous and require a mix of processing resources used for tasks ranging in complexity from local-area-network control, translation, and bridging to parallel object recognition based on deep-learning algorithms running on neural networks. As a result, the current level of more than 100 CPUs found in luxury piloted vehicles could easily swell to several hundred CPUs and other processing elements for more advanced, autonomous vehicles.

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