Alphawave IP CEO Tony Pialis recently gave a presentation about how DSP is enabling 224 Gbps serial links at the Design & Reuse virtual IP-SOC event. Below we outline some of the highlights and information from this presentation.
DSP SerDes Introduction
Tony started by discussing the differences between an analog SerDes and a digital, or DSP SerDes. He explained that an analog SerDes can work reliably up to 36db NRZ or 30db PAM4. Since all equalization is implemented in the continuous time domain, this technology is sensitive to process variation. With a DSP-based design, most of the equalization is done digitally, allowing for more robust operation to 45db NRZ and 36db+ PAM4. This kind of design is also not very sensitive to process variation. Tony pointed out that the high-speed ADC required for a digital design like this is challenging to build.
Tony then went into some detail about analog linear equalization vs. DSP linear equalization. Clearly, the DSP approach is a better match for the demands of high-speed links.
The Road to 200Gbps Serial Links
Next, Tony discussed the challenges of getting from current 112Gbps PAM4 SerDes to 224Gbps PAM4 devices. Keeping the architecture the same, one can see that the reach for the device is dramatically reduced – roughly one inch vs. one foot. This is a serious challenge.
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