Industry Expert Blogs

An exponential rise in data volume, and the meteoric rise of advanced workloads like AI/ML training, requires constant innovation in all aspects of computing. Memory bandwidth is a critical enabler of unleashing the power of processors and accelerators, and the High Bandwidth Memory (HBM) standard has evolved rapidly to deliver the performance required by the most demanding applications.

For current generation HBM2E, Rambus introduced the industry’s fastest memory subsystem capable of 4 gigabits per second (Gbps) operation. With a 1024-bit wide interface, 4 Gbps signaling delivers 512 gigabytes per second (GB/s) of bandwidth. In accelerator architectures with 4-6 HBM2E DRAM devices (each device being a 3D stack of DRAM chips), there’s the capability for 2-3 Terabytes per second (TB/s) of memory bandwidth. That’s enormous, but the appetite for bandwidth is insatiable, so the wheel of innovation needs to keep spinning.

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