Fabless semiconductor companies usually use third-party IP blocks when developing ICs. An important IP is on-chip ESD protection. Caution must be exercised in choosing the right ESD IP to avoid patent infringement and inefficient ESD clamps.
ESD IP of choice should be silicon proven and directly compatible with your usual design process. Thomas Ako made a presentation about the IP selection process on the 2021 IP-SOC event in Grenoble in December 2021.