From automated assembly line equipment that falters to laptops that continually crash, a variety of electronic system issues can be traced back to chip failures caused by electrostatic discharge (ESD). In fact, more than 30% of semiconductor failures stem from ESD and such failures can be even more damaging when they impact safety-critical applications, such as a vehicle’s automated braking system. So, anything you can do to bring this percentage down would be beneficial for end application users as well as your bottom line.
Until now, it’s been difficult to get a reliable, exhaustive analysis of all ESD events across the entire chip. Solutions on the market have only been able to perform static analysis, limited in their ability to simulate the true transient nature of ESD. Yet, designers need to have confidence that their ESD protection devices are reliable and not any larger than they should be.
Now there’s new technology for you to build in reliability against all ESD events in your silicon chips: Synopsys PrimeESD full-chip ESD analysis solution. PrimeESD improves turnaround time and reliability by delivering exhaustive analysis of all ESD events across the chip and package. Its advanced algorithms and simulation techniques analyze ESD protection structures within an IC design. Read on to learn how the solution can help increase designer productivity and improve your design’s reliability.
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