Industry Expert Blogs

Introduction to CXL 3.0

CXL 3.0 is an open-standard interconnect technology that builds upon PCIe 6.0 to facilitate high-speed communication between CPUs and peripheral devices. With a doubled bandwidth of 64 GT/s and enhanced fabric capabilities, CXL 3.0 aims to optimize system-level flows, improve resource utilization, and enable new device types for composable disaggregated infrastructure.

Unveiling the Viral Feature

Viral is an error containment mechanism. CXL links and CXL devices are expected to be Viral-compliant. Viral support capability and control for enabling are reflected in the DVSEC. Viral is not a replacement for existing error-reporting mechanisms. Instead, its purpose is an additional error-containment mechanism.

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