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Browse Foundation
Arithmetic & Mathematic (58)
Embedded Memories (996)
I/O Library (1030)
PLL (1747)
Standard cell (756)
CAM (30)
Diffusion ROM (3)
DRAM (1)
Dual-Port SRAM (30)
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Clock Generator PLL (406)
Deskew PLL (356)
Frac-N PLL (58)
General Purpose PLL (484)
IoT PLL (48)
Low Bandwidth PLL (3)
Low Power PLL (14)
MIPI D-PHY (1)
Spread Spectrum PLL (377)
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4587 IP
601
1.0
VeriSilicon SMIC 0.13um 1.2V/3.3V Multiple I/O Cell
VeriSilicon SMIC 0.13um 1.2V/3.3V Multiple I/O Cell (06) Library developed by VeriSilicon supports power/ground pads, bi-directional I/O, and input bu...
602
1.0
VeriSilicon SMIC 0.13um 1.2V/3.3V SSTLCOMBO_01 I/O Cell Library
VeriSilicon SMIC 0.13μm SSTL2/SSTL3 Combo I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corpora...
603
1.0
VeriSilicon SMIC 0.13um 1.2V/3.3V SSTLCOMBO_02 I/O Cell Library
VeriSilicon SMIC 0.13μm SSTL2/SSTL18 Combo I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corpo...
604
1.0
VeriSilicon SMIC 0.13um High-Speed Synchronous Single-Port SRAM compiler, Memory Array Range:256 to 128K Bits
VeriSilicon SMIC 0.13um High-Speed Synchronous Single-Port SRAM compiler optimized for Semiconductor Manufacturing International Corporation (SMIC) 0....
605
1.0
VeriSilicon SMIC 0.13um Syn. LP DROM Compiler, Memory Array Range:128 to 1Mega Bits
VeriSilicon SMIC 0.13um synchronous programmable Low Power diffusion ROM compiler optimized for Semiconductor Manufacturing International Corporation ...
606
1.0
VeriSilicon SMIC 0.13um Syn. LP VROM Compiler, Memory Array Range:128 to 1Mega Bits
VeriSilicon SMIC 0.13um Synchronous programmable Low Power Via1 ROM compiler optimized for Semiconductor Manufacturing International Corporation (SMIC...
607
1.0
VeriSilicon SMIC 0.13um Synchronous programmable Via1 ROM compiler,Memory Array Range:128 to 1Mega Bits
VeriSilicon SMIC 0.13um Synchronous programmable Via1 ROM compiler optimized for Semiconductor Manufacturing International Corporation (SMIC) 0.13um L...
608
1.0
VeriSilicon SMIC 0.13um Ultra-Low-Power Synchronous Single-Port SRAM compiler,Memory Array Range:512 to 512K Bits
VeriSilicon SMIC 0.13um Ultra-Low-Power Synchronous Single-Port SRAM compiler optimized for Semiconductor Manufacturing International Corporation (SMI...
609
1.0
VeriSilicon SMIC 0.13umLL 1P3M High-Density Synchronous Single-Port SRAM compiler, Memory Array Range:128 to 512K Bits
VeriSilicon SMIC 0.13umLL 1P3M High-Density Synchronous Single-Port SRAM compiler optimized for Semiconductor Manufacturing International Corporation ...
610
1.0
VeriSilicon SMIC 0.13¦Ìm 1.2V/2.5V DUPIO_01 Library
VeriSilicon SMIC 0.13¦Ìm 1.2V/2.5V DUP I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporatio...
611
1.0
VeriSilicon SMIC 0.13¦Ìm 1.2V/3.3V ANALOGIO_DUP_05 IO Library
VeriSilicon SMIC 0.13um 1.2V/3.3V ANALOGIO_DUP_05 IO library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corpo...
612
1.0
VeriSilicon SMIC 0.13¦Ìm 1.2V/3.3V DUPIO_01 Library
VeriSilicon SMIC 0.13¦Ìm 1.2V/3.3V DUP I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporatio...
613
1.0
VeriSilicon SMIC 0.16um 1.8V/3.3V VPPIO_01 IO Library
VeriSilicon SMIC 0.16um 1.8V/3.3V VPPIO_01 IO library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporation ...
614
1.0
VeriSilicon SMIC 0.18um LL Pro Syn. LP DROM Compiler, Memory Array Range:128 to 2Mega Bits
VeriSilicon SMIC 0.18um Low Leakage Process Synchronous Low Power Diffusion ROM compiler optimized for Semiconductor Manufacturing International Corpo...
615
1.0
VeriSilicon SMIC 0.18um LL Pro Syn. LP VROM Compiler, Memory Array Range:128 to 2Mega Bits
VeriSilicon SMIC 0.18um Low Leakage Process Synchronous Programmable Low Power Via1 ROM compiler optimized for Semiconductor Manufacturing Internation...
616
1.0
VeriSilicon SMIC 0.18um LL Pro. Syn. VROM Compiler, Memory Array Range:128 to 2Mega Bits
VeriSilicon SMIC 0.18um Low Leakage Process Synchronous programmable Via1 ROM compiler optimized for Semiconductor Manufacturing International Corpora...
617
1.0
VeriSilicon SMIC 0.18¦Ìm 1.8V/3.3V ANALOGIO_DUP_05 IO Library
VeriSilicon SMIC 0.18um 1.8V/3.3V ANALOGIO_DUP_05 IO library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corpo...
618
1.0
VeriSilicon SMIC 0.18¦Ìm 1.8V/3.3V VPPIO_DUP_01 IO Library
VeriSilicon SMIC 0.18um 1.8V/3.3V VPPIO_DUP_01 IO library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporat...
619
1.0
VeriSilicon SMIC 0.18μm 1.8V/3.3V ANALOGIO_05 IO Library
VeriSilicon SMIC 0.18um 1.8V/3.3V ANALOGIO_05 IO library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporati...
620
1.0
VeriSilicon SMIC 0.18μm 1.8V/3.3V CFIO_01 Library
VeriSilicon SMIC 0.18μm CF I/O Cell (01) Library developed by VeriSilicon is optimized for SMIC 0.18μm 1P6M Salicide logic process. This library suppo...
621
1.0
VeriSilicon SMIC 0.18µm 1.8V/3.3V VPPIO_01 IO Library
VeriSilicon SMIC 0.18um 1.8V/3.3V VPPIO_01 IO library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporation ...
622
1.0
VeriSilicon TSMC 0.13¦Ìm 1.2V/2.5V DUPIO_01 Library
VeriSilicon TSMC 0.13¦Ìm 1.2V/2.5V DUP I/O Cell Library developed by VeriSilicon is optimized for Taiwan Semiconductor Manufacturing Company (TSMC) 0....
623
1.0
VeriSilicon TSMC 0.13¦Ìm 1.2V/3.3V DUPIO_01 Library
VeriSilicon TSMC 0.13¦Ìm 1.2V/3.3V DUP I/O Cell Library developed by VeriSilicon is optimized for Taiwan Semiconductor Manufacturing Company (TSMC) 0....
624
1.0
VeriSilicon UMC 0.18μm CF I/O
VeriSilicon UMC 0.18μm CF I/O Cell (01) Library developed by VeriSilicon is optimized for UMC 0.18μm 1.8v/3.3v 1P6M Generic II logic process...
625
1.0
VeriSilicon UMC 0.18μm CF I/O
VeriSilicon UMC 0.18μm CF I/O Cell (01) Library developed by VeriSilicon is optimized for UMC 0.18μm 1.8v/3.3v 1P6M Generic II logic process. This lib...
626
1.0
GF 0.13um Single-Port/Dual-Port SRAM, Single-Port/Two-Port Register File and Diffusion ROM Compiler
VeriSilicon CHRT 0.13um High-Speed Synchronous Memory Compiler optimized for Global Foundry 0.13um Logic 1P9M Salicide 1.2/2.5(3.3)V process can flexi...
627
1.0
GF 65nm 1.0V<->3.3V level shifter
GF65nm 1.0V3.3V Level Shfiter Library...
628
1.0
GF 65nm 3.3V Standard Cell Library
GF 65nm 3.3V Standard Cell Library...
629
1.0
GF L013HP 130nm Clock Generator PLL - 105MHz-525MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
630
1.0
GF L013HP 130nm Clock Generator PLL - 210MHz-1050MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
631
1.0
GF L013HP 130nm Clock Generator PLL - 420MHz-2100MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
632
1.0
GF L013HP 130nm Deskew PLL - 105MHz-525MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
633
1.0
GF L013HP 130nm Deskew PLL - 210MHz-1050MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
634
1.0
GF L013HP 130nm Deskew PLL - 420MHz-2100MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
635
1.0
GF L013HP 130nm General Purpose PLL - 210MHz-1050MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...
636
1.0
GF L013HP 130nm Spread Spectrum PLL - 105MHz-525MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
637
1.0
GF L013HP 130nm Spread Spectrum PLL - 210MHz-1050MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
638
1.0
GF L013HP 130nm Spread Spectrum PLL - 420MHz-2100MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
639
1.0
GF L013LP 130nm Clock Generator PLL - 180MHz-900MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
640
1.0
GF L013LP 130nm Clock Generator PLL - 45MHz-225MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
641
1.0
GF L013LP 130nm Clock Generator PLL - 90MHz-450MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
642
1.0
GF L013LP 130nm Deskew PLL - 180MHz-900MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
643
1.0
GF L013LP 130nm Deskew PLL - 45MHz-225MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
644
1.0
GF L013LP 130nm Deskew PLL - 90MHz-450MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
645
1.0
GF L013LP 130nm General Purpose PLL - 90MHz-450MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...
646
1.0
GF L013LP 130nm Spread Spectrum PLL - 180MHz-900MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
647
1.0
GF L013LP 130nm Spread Spectrum PLL - 45MHz-225MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
648
1.0
GF L013LP 130nm Spread Spectrum PLL - 90MHz-450MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
649
1.0
GF L013LV 130nm Clock Generator PLL - 150MHz-750MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
650
1.0
GF L013LV 130nm Clock Generator PLL - 300MHz-1500MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
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