Design & Reuse
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2786 IP
1151
0.3729
Automotive I2C Fail-Safe Interface (CDM5A/7A-ESD) - TSMC 16nm 16FFC,FF
Dolphin s interface IP for standard I/O and specialty I/O delivers ultra high performance for DDRx4, LPDDRx, DDR PHY, LVDS, LVPECL, I2C, PCI, SerDes, ...
1152
0.3729
LVDS Combo with PVT Compensation - TSMC 12nm 12FFC,FFC+
Dolphin s interface IP for standard I/O and specialty I/O delivers ultra high performance for DDRx4, LPDDRx, DDR PHY, LVDS, LVPECL, I2C, PCI, SerDes, ...
1153
0.3729
LVDS Combo with PVT Compensation - TSMC 16nm 16FFC,FF
Dolphin s interface IP for standard I/O and specialty I/O delivers ultra high performance for DDRx4, LPDDRx, DDR PHY, LVDS, LVPECL, I2C, PCI, SerDes, ...
1154
0.3729
LVDS/LVPECL combo pad - TSMC 55nm 55GP,LP,LP_EMF,ULP,ULP_EMF
Dolphin's hardened DDR2/3/4 SDRAM PHY and LPDDR2/3 SDRAM PHY IP is a silicon-proven, Combo PHY supporting speeds up to 2133 Mbps. It is fully complian...
1155
0.3729
LVDS/LVPECL combo pad - TSMC 65nm 65GP,LP,LP_EMF
Dolphin's hardened DDR2/3/4 SDRAM PHY and LPDDR2/3 SDRAM PHY IP is a silicon-proven, Combo PHY supporting speeds up to 2133 Mbps. It is fully complian...
1156
0.3729
LVDS/LVPECL combo pad - TSMC 80nm 80GC,LP_EMF
Dolphin's hardened DDR2/3/4 SDRAM PHY and LPDDR2/3 SDRAM PHY IP is a silicon-proven, Combo PHY supporting speeds up to 2133 Mbps. It is fully complian...
1157
0.3729
LVDS/LVPECL combo pad - TSMC 90nm 90G,GT,LP
Dolphin's hardened DDR2/3/4 SDRAM PHY and LPDDR2/3 SDRAM PHY IP is a silicon-proven, Combo PHY supporting speeds up to 2133 Mbps. It is fully complian...
1158
0.118
8 Lanes LVDS RX IO PAD, UMC 40nm LP/RVT LowK Logic Process
8 Lanes LVDS RX IO PAD, UMC 40nm LP/RVT LowK Logic Process...
1159
0.118
0.11um LVDS TX I/O PAD ; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process
0.11um LVDS TX I/O PAD ; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process...
1160
0.118
3.3V FPD-link LVDS Transmitter 16~100MHz; UMC 28nm HPC plus proces
3.3V FPD-link LVDS Transmitter 16~100MHz; UMC 28nm HPC plus proces...
1161
0.118
3.3V FPD-link LVDS Transmitter 16~100MHz; UMC 28nm HPC process
3.3V FPD-link LVDS Transmitter 16~100MHz; UMC 28nm HPC process...
1162
0.118
3.3v LVDS RX IO 1.25Gbps, UMC 40nm LP/RVT LowK Logic Process
3.3v LVDS RX IO 1.25Gbps, UMC 40nm LP/RVT LowK Logic Process...
1163
0.118
3.3v LVDS RX, 3 data lane and 1 clock lane using UMC 40nm LP/RVT LowK Logic Process
3.3v LVDS RX, 3 data lane and 1 clock lane using UMC 40nm LP/RVT LowK Logic Process...
1164
0.118
3.3v LVDS RX,UMC 40nm LP/RVT LowK Logic Process
3.3v LVDS RX,UMC 40nm LP/RVT LowK Logic Process...
1165
0.118
3.3V LVDS Transmitter 16~100MHz; 55nm SP/RVT LowK Logic Process
3.3V LVDS Transmitter 16~100MHz; 55nm SP/RVT LowK Logic Process...
1166
0.118
3.3V LVDS Transmitter 700Mbps; UMC 40nm LP LowK Logic Process
3.3V LVDS Transmitter 700Mbps; UMC 40nm LP LowK Logic Process...
1167
0.118
2.5V FPD-link LVDS Transmitter 16~178.6MHz; UMC 40nm LP Low-K process
2.5V FPD-link LVDS Transmitter 16~178.6MHz; UMC 40nm LP Low-K process...
1168
0.118
2.5V LVDS Transmitter 1.25Gbps; UMC 40nm LP LowK Logic Process.
2.5V LVDS Transmitter 1.25Gbps; UMC 40nm LP LowK Logic Process....
1169
0.118
2.5V LVDS Transmitter 700Mbps; UMC 40nm LP LowK Logic Process. (Modify layout )
2.5V LVDS Transmitter 700Mbps; UMC 40nm LP LowK Logic Process. (Modify layout )...
1170
0.118
1.8v LVDS RX IO 800Mbps, UMC 40nm LP/RVT LowK Logic Process
1.8v LVDS RX IO 800Mbps, UMC 40nm LP/RVT LowK Logic Process...
1171
0.118
1.8V Sub-LVDS Receiver 650Mbps; UMC 28nm HPC process
1.8V Sub-LVDS Receiver 650Mbps; UMC 28nm HPC process...
1172
0.118
10 lane FXSLVTX030HH0L bias circuit ; UMC 40nm LP/RVT Logic Process
10 lane FXSLVTX030HH0L bias circuit ; UMC 40nm LP/RVT Logic Process...
1173
0.118
100MHz Reference Clock Single-end to Differential Buffer for PCIE Gen.I; UMC 0.13um HS/FSG LOGIC/MIXEDMODE Enhance Process
100MHz Reference Clock Single-end to Differential Buffer for PCIE Gen.I; UMC 0.13um HS/FSG LOGIC/MIXEDMODE Enhance Process...
1174
0.118
100MHz single-ended to differential clock buffer for UMC 40nm LP.
100MHz single-ended to differential clock buffer for UMC 40nm LP....
1175
0.118
40LP 2PRF with Sleep/Retention/Nap mode & peri LVT feature
40LP 2PRF with Sleep/Retention/Nap mode & peri LVT feature...
1176
0.118
40LP High density dual port SRAM compiler with Vss booster feature
40LP High density dual port SRAM compiler with Vss booster feature...
1177
0.118
40LP PG SP-SRAM LVT Peripheral with Row redundancy for 213 cell
40LP PG SP-SRAM LVT Peripheral with Row redundancy for 213 cell...
1178
0.118
110nm BCD process Synchronous High-Density Single-Port SRAM Compiler
110nm BCD process Synchronous High-Density Single-Port SRAM Compiler...
1179
0.118
55 SP Dual Port SRAM compiler with 1P4M metal option
55 SP Dual Port SRAM compiler with 1P4M metal option...
1180
0.118
55nm eFlash Dual-Port SRAM memory compiler with row redundancy
55nm eFlash Dual-Port SRAM memory compiler with row redundancy...
1181
0.118
55nm-SP, FPD-Link Receiver, 3.3V/1.0V, 4 data plus 1 clock channel, 16~85MHz, DLL type,
55nm-SP, FPD-Link Receiver, 3.3V/1.0V, 4 data plus 1 clock channel, 16~85MHz, DLL type,...
1182
0.118
55ULP-SST 1P-RF with forward biased and HVT periphery
55ULP-SST 1P-RF with forward biased and HVT periphery...
1183
0.118
55ULP-SST 1P-RF with forward biased and UHVT periphery
55ULP-SST 1P-RF with forward biased and UHVT periphery...
1184
0.118
28nm HPC, LVDS RXIO, 500Mbps, 1.8V/0.9V
28nm HPC, LVDS RXIO, 500Mbps, 1.8V/0.9V...
1185
0.118
28nm HPM 1PRF with peri -LVT
28nm HPM 1PRF with peri -LVT...
1186
0.118
28nm HPM SH with Row redundancy
28nm HPM SH with Row redundancy...
1187
0.118
28nm HPM SP-SRAM with 1 column redundancy
28nm HPM SP-SRAM with 1 column redundancy...
1188
0.118
28nm HPM SP-SRAM with 2 column redundancy
28nm HPM SP-SRAM with 2 column redundancy...
1189
0.118
28nm HPM SP-SRAM with peri LVT
28nm HPM SP-SRAM with peri LVT...
1190
0.118
28nm HPM SP-SRAM with peri LVT & 2 column repair
28nm HPM SP-SRAM with peri LVT & 2 column repair...
1191
0.118
28nm HPM SP-SRAM with peri LVT & row & 1 column repair
28nm HPM SP-SRAM with peri LVT & row & 1 column repair...
1192
0.118
28nm HPM SP-SRAM with peri LVT row repair
28nm HPM SP-SRAM with peri LVT row repair...
1193
0.118
28nm HPM SP-SRAM with peri-LVT 1 column repair
28nm HPM SP-SRAM with peri-LVT 1 column repair...
1194
0.118
28nm HPM SP-SRAM with row and 1 column repair
28nm HPM SP-SRAM with row and 1 column repair...
1195
0.118
28nm HPM SP-SRAM with Row and 2 Column Repair
28nm HPM SP-SRAM with Row and 2 Column Repair...
1196
0.118
28nm Logic and Mixed-Mode HLP/RVT Process Multi-Voltage BOAC I/O Cell library
28nm Logic and Mixed-Mode HLP/RVT Process Multi-Voltage BOAC I/O Cell library...
1197
0.118
28nm Logic and Mixed-Mode HPC/RVT Process Multi-Voltage BOAC I/O Cell library
28nm Logic and Mixed-Mode HPC/RVT Process Multi-Voltage BOAC I/O Cell library...
1198
0.118
Faraday 1.8V crystal oscillator I/O Cell Library ; UMC 14nm LOGIC_MIXED-FF+ Process
Faraday 1.8V crystal oscillator I/O Cell Library ; UMC 14nm LOGIC_MIXED-FF+ Process...
1199
0.118
General Purpose IO IP, 1.8V BOAC EMMC I/O, Support built-in Pull-Up / Pull-Down , UMC 28nm HLP process
UMC 28nm Logic and Mixed-Mode HLP/RVT process 1.8V BOAC EMMC IO Cell Library (with customized PU/PD function)....
1200
0.118
General Purpose IO IP, 1.8V Operations, UMC 0.18um eHV process
UMC 0.18um Embedded High-Volatge process,1.8V IO Cells....