Design & Reuse
Catalog of SIP Cores
System on Chip design resources
arrow Arithmetic & Mathematic (58)
arrow Embedded Memories (996)
arrow I/O Library (1030)
arrow PLL (1747)
arrow Standard cell (756)
4587 IP
1201
1.0
GSMC 0.18um Crystal Oscillator IO
This is a crystal oscillator IO pad designed for low-power consumption application. The OSC power supply is 3.3V, and the IO pad provides clock signal...
1202
1.0
GSMC 0.18um IO Library
GSMC 0.18um process 1.8v/3.3v Generic IO library...
1203
1.0
CSMC 0.18um IO Library
CSMC 0.18um process 1.8v/3.3v Generic IO library...
1204
1.0
GSMC 0.18um Low Power 9track Standard Cell Library, 1.8v operating voltage
GSMC 0.18um Low Power 9 track Standard Cell Library...
1205
1.0
GSMC 0.18um LP IO Library
GSMC 0.18um LP process 1.8v/3.3v Generic IO library...
1206
1.0
GSMC 0.18um Single-Port/Dual-Port SRAM, Single-Port/Two-Port Register File and Diffusion ROM Compiler
VeriSilicon GSMC 0.18um High-Speed Synchronous Memory Compiler optimized for Grace Semiconductor Manufacturing Corporation (GSMC) 0.18um Logic/Analog ...
1207
1.0
CSMC 0.18um Single-Port/Dual-Port SRAM, Single-Port/Two-Port Register File and Via1 ROM Compiler
VeriSilicon CSMC 0.18um High-Speed Synchronous Memory Compiler optimized for CSMC TECHNOLOGIES CORPORATION Fab2 0.18um MS/RF process can flexibly gene...
1208
1.0
CSMC 0.18um Standard Cell Library, 1.8v operating voltage
CSMC 0.18um Standard Cell Library...
1209
1.0
GSMC 0.18um ULL IO Library
GSMC 0.18um ULL process 1.8v/3.3v Generic IO library...
1210
1.0
GSMC 0.18um Ultra Low Leakage 9track Standard Cell Library, 1.8v operating voltage
GSMC 0.18um Ultra Low Leakage 9 track Standard Cell Library...
1211
1.0
GSMC 0.18umLP Single-Port/Dual-Port SRAM, Single-Port/Two-Port Register File and Diffusion ROM Compiler
VeriSilicon GSMC 0.18um High-Speed Synchronous IBLP Memory Compiler optimized for Grace Semiconductor Manufacturing Corporation (GSMC) 0.18um Logic 1P...
1212
1.0
GSMC 0.18umOTP Single-Port/Dual-Port SRAM and Diffusion ROM Compiler
VeriSilicon GSMC 0.18um G9 3.3V Synchronous Memory Compiler optimized for Grace Semiconductor Manufacturing Corporation (GSMC) 0.18um Generic 1P3M 3.3...
1213
1.0
GSMC 0.18umULL Single-Port/Dual-Port SRAM, Single-Port/Two-Port Register File and Diffusion ROM Compiler
VeriSilicon GSMC 0.18um Ultra Low Leakage Process High-Speed Synchronous Memory Compiler optimized for Grace Semiconductor Manufacturing Corporation (...
1214
1.0
GSMC 0.25um Standard Cell Library, 2.5v operating voltage
GSMC 0.25um Standard Cell Library...
1215
1.0
GSMC 0.25um IO Library
GSMC 0.25um process 2.5v/3.3v Generic IO library...
1216
1.0
GSMC 0.25um Single-Port/Dual-Port SRAM, Single-Port/Two-Port Register File and Diffusion ROM Compiler
VeriSilicon GSMC 0.25um High-Speed Synchronous Memory Compiler optimized for Grace Semiconductor Manufacturing Corporation (GSMC) 0.25um Logic 1P5M Sa...
1217
1.0
TSMC 12nm FFC 6track Delay Cells
TSMC 12nm FFC 6 track High Density Delay Cells...
1218
1.0
TSMC CL013G 130nm Clock Generator PLL - 136MHz-680MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
1219
1.0
TSMC CL013G 130nm Clock Generator PLL - 272MHz-1360MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
1220
1.0
TSMC CL013G 130nm Clock Generator PLL - 68MHz-340MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
1221
1.0
TSMC CL013G 130nm Deskew PLL - 136MHz-680MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
1222
1.0
TSMC CL013G 130nm Deskew PLL - 272MHz-1360MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
1223
1.0
TSMC CL013G 130nm Deskew PLL - 68MHz-340MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
1224
1.0
TSMC CL013G 130nm General Purpose PLL - 136MHz-680MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...
1225
1.0
TSMC CL013G 130nm Spread Spectrum PLL - 136MHz-680MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
1226
1.0
TSMC CL013G 130nm Spread Spectrum PLL - 272MHz-1360MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
1227
1.0
TSMC CL013G 130nm Spread Spectrum PLL - 68MHz-340MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
1228
1.0
TSMC CL013LP 130nm Clock Generator PLL - 110MHz-550MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
1229
1.0
TSMC CL013LP 130nm Clock Generator PLL - 220MHz-1100MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
1230
1.0
TSMC CL013LP 130nm Clock Generator PLL - 55MHz-275MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
1231
1.0
TSMC CL013LP 130nm Deskew PLL - 110MHz-550MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
1232
1.0
TSMC CL013LP 130nm Deskew PLL - 220MHz-1100MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
1233
1.0
TSMC CL013LP 130nm Deskew PLL - 55MHz-275MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
1234
1.0
TSMC CL013LP 130nm General Purpose PLL - 110MHz-550MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...
1235
1.0
TSMC CL013LP 130nm Spread Spectrum PLL - 110MHz-550MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
1236
1.0
TSMC CL013LP 130nm Spread Spectrum PLL - 220MHz-1100MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
1237
1.0
TSMC CL013LP 130nm Spread Spectrum PLL - 55MHz-275MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
1238
1.0
TSMC CL013LV 130nm Clock Generator PLL - 160MHz-800MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
1239
1.0
TSMC CL013LV 130nm Clock Generator PLL - 320MHz-1600MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
1240
1.0
TSMC CL013LV 130nm Clock Generator PLL - 80MHz-400MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
1241
1.0
TSMC CL013LV 130nm Deskew PLL - 160MHz-800MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
1242
1.0
TSMC CL013LV 130nm Deskew PLL - 320MHz-1600MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
1243
1.0
TSMC CL013LV 130nm Deskew PLL - 80MHz-400MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
1244
1.0
TSMC CL013LV 130nm General Purpose PLL - 160MHz-800MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...
1245
1.0
TSMC CL013LV 130nm Spread Spectrum PLL - 160MHz-800MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
1246
1.0
TSMC CL013LV 130nm Spread Spectrum PLL - 320MHz-1600MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
1247
1.0
TSMC CL013LV 130nm Spread Spectrum PLL - 80MHz-400MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
1248
1.0
TSMC CL013LVOD 130nm Clock Generator PLL - 110MHz-550MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
1249
1.0
TSMC CL013LVOD 130nm Clock Generator PLL - 220MHz-1100MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
1250
1.0
TSMC CL013LVOD 130nm Clock Generator PLL - 440MHz-2200MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...