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2786 IP
1451
0.118
UMC 28nm HPC process Dual Port SRAM with row repair & LVT
UMC 28nm HPC process Dual Port SRAM with row repair & LVT...
1452
0.118
UMC 28nm HPC process One Port Register File with LVT
UMC 28nm HPC process One Port Register File with LVT...
1453
0.118
UMC 28nm HPC process PG Dual Port SRAM with LVT
UMC 28nm HPC process PG Dual Port SRAM with LVT...
1454
0.118
UMC 28nm HPC process PG Two Port Register File
UMC 28nm HPC process PG Two Port Register File...
1455
0.118
UMC 28nm HPC process PG Two Port Register File with peri-HVT
UMC 28nm HPC process PG Two Port Register File with peri-HVT...
1456
0.118
UMC 28nm HPC process PG Two Port Register File with peri-LVT
UMC 28nm HPC process PG Two Port Register File with peri-LVT...
1457
0.118
UMC 28nm HPC Process PG Via ROM Compiler
UMC 28nm HPC Process PG Via ROM Compiler...
1458
0.118
UMC 28nm HPC process PG-2PRF with Bank4
UMC 28nm HPC process PG-2PRF with Bank4...
1459
0.118
UMC 28nm HPC process PG-2PRF with HVT Bank4
UMC 28nm HPC process PG-2PRF with HVT Bank4...
1460
0.118
UMC 28nm HPC process PG-2PRF with LVT and Bank 2
UMC 28nm HPC process PG-2PRF with LVT and Bank 2...
1461
0.118
UMC 28nm HPC process PG-Dual Port SRAM with LVT
UMC 28nm HPC process PG-Dual Port SRAM with LVT...
1462
0.118
UMC 28nm HPC process standard synchronous high density dual port SRAM memory compiler.
UMC 28nm HPC process standard synchronous high density dual port SRAM memory compiler....
1463
0.118
UMC 28nm HPC process standard synchronous high density single port low power SRAM memory compiler with row redundancy
UMC 28nm HPC process standard synchronous high density single port low power SRAM memory compiler with row redundancy...
1464
0.118
UMC 28nm HPC process standard synchronous HVT periphery high density single port low power SRAM memory compiler with row redundancy
UMC 28nm HPC process standard synchronous HVT periphery high density single port low power SRAM memory compiler with row redundancy...
1465
0.118
UMC 28nm HPC process standard synchronous LVT periphery high density single port low power SRAM memory compiler with row redundancy
UMC 28nm HPC process standard synchronous LVT periphery high density single port low power SRAM memory compiler with row redundancy...
1466
0.118
UMC 28nm HPC process synchronous HVT periphery high density single port SRAM memory compiler.
UMC 28nm HPC process synchronous HVT periphery high density single port SRAM memory compiler....
1467
0.118
UMC 28nm HPC process synchronous LVT periphery high density single port SRAM memory compiler.
UMC 28nm HPC process synchronous LVT periphery high density single port SRAM memory compiler....
1468
0.118
UMC 28nm HPC process Two Port Register File
UMC 28nm HPC process Two Port Register File...
1469
0.118
UMC 28nm HPC process Two Port Register File with Bank2
UMC 28nm HPC process Two Port Register File with Bank2...
1470
0.118
UMC 28nm HPC process Two Port Register File with LVT and Bank2
UMC 28nm HPC process Two Port Register File with LVT and Bank2...
1471
0.118
UMC 28nm HPC process Two Port Register File with LVT and Bank4
UMC 28nm HPC process Two Port Register File with LVT and Bank4...
1472
0.118
UMC 28nm HPC process Two Port Register File with peri LVT
UMC 28nm HPC process Two Port Register File with peri LVT...
1473
0.118
UMC 28nm HPC Process Ultra High Speed One Port Register File Memory Compiler
UMC 28nm HPC Process Ultra High Speed One Port Register File Memory Compiler...
1474
0.118
UMC 28nm HPC Process Ultra High Speed One Port Register File Memory Compiler with periphery LVT
UMC 28nm HPC Process Ultra High Speed One Port Register File Memory Compiler with periphery LVT...
1475
0.118
UMC 28nm HPC Process Ultra High Speed Single-Port SRAM memory compiler
UMC 28nm HPC Process Ultra High Speed Single-Port SRAM memory compiler...
1476
0.118
UMC 28nm HPC Process Ultra High Speed Single-Port SRAM Memory Compiler
UMC 28nm HPC Process Ultra High Speed Single-Port SRAM Memory Compiler...
1477
0.118
UMC 28nm HPC+ Logic Process, LVDS RX Receives serial LVDS signal and de-serialize them into parallel format
UMC 28nm HPC+ Logic Process, LVDS RX Receives serial LVDS signal and de-serialize them into parallel format...
1478
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track eco_m1 cell library (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track eco_m1 cell library (C35)...
1479
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track generic_core cell library (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track generic_core cell library (C35)...
1480
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track generic_core cell library (C40)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track generic_core cell library (C40)...
1481
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track PowerSlash cell library (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track PowerSlash cell library (C35)...
1482
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C30)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C30)...
1483
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library enhanced for routing (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library enhanced for routing (C35)...
1484
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C30)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C30)...
1485
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C35)...
1486
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C40)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C40)...
1487
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track POWERSLASH cell library enhanced for routing (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track POWERSLASH cell library enhanced for routing (C35)...
1488
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track ECO_M1 cell library enhanced for routing (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track ECO_M1 cell library enhanced for routing (C35)...
1489
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C30)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C30)...
1490
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C35)...
1491
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C40)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C40)...
1492
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track POWERSLASH cell library enhanced for routing (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track POWERSLASH cell library enhanced for routing (C35)...
1493
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track eco_m1 cell library (C35)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track eco_m1 cell library (C35)...
1494
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track PowerSlash cell library (C35)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track PowerSlash cell library (C35)...
1495
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Cell library (C35)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Cell library (C35)...
1496
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C30)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C30)...
1497
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C40)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C40)...
1498
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library enhanced for routing (C35)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library enhanced for routing (C35)...
1499
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C30)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C30)...
1500
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C35)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C35)...
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