Design & Reuse
Catalog of SIP Cores
System on Chip design resources
4587 IP
1451
1.0
TSMC CLN90GOD 90nm Clock Generator PLL - 440MHz-2200MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
1452
1.0
TSMC CLN90GOD 90nm Deskew PLL - 110MHz-550MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
1453
1.0
TSMC CLN90GOD 90nm Deskew PLL - 220MHz-1100MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
1454
1.0
TSMC CLN90GOD 90nm Deskew PLL - 440MHz-2200MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
1455
1.0
TSMC CLN90GOD 90nm General Purpose PLL - 220MHz-1100MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...
1456
1.0
TSMC CLN90GOD 90nm Spread Spectrum PLL - 110MHz-550MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
1457
1.0
TSMC CLN90GOD 90nm Spread Spectrum PLL - 220MHz-1100MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
1458
1.0
TSMC CLN90GOD 90nm Spread Spectrum PLL - 440MHz-2200MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
1459
1.0
TSMC CLN90GT 90nm Clock Generator PLL - 125MHz-625MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
1460
1.0
TSMC CLN90GT 90nm Clock Generator PLL - 250MHz-1250MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
1461
1.0
TSMC CLN90GT 90nm Clock Generator PLL - 500MHz-2500MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
1462
1.0
TSMC CLN90GT 90nm Deskew PLL - 125MHz-625MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
1463
1.0
TSMC CLN90GT 90nm Deskew PLL - 250MHz-1250MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
1464
1.0
TSMC CLN90GT 90nm Deskew PLL - 500MHz-2500MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
1465
1.0
TSMC CLN90GT 90nm General Purpose PLL - 250MHz-1250MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...
1466
1.0
TSMC CLN90GT 90nm Spread Spectrum PLL - 125MHz-625MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
1467
1.0
TSMC CLN90GT 90nm Spread Spectrum PLL - 250MHz-1250MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
1468
1.0
TSMC CLN90GT 90nm Spread Spectrum PLL - 500MHz-2500MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
1469
1.0
TSMC CLN90LP 90nm Clock Generator PLL - 120MHz-600MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
1470
1.0
TSMC CLN90LP 90nm Clock Generator PLL - 240MHz-1200MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
1471
1.0
TSMC CLN90LP 90nm Clock Generator PLL - 60MHz-300MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
1472
1.0
TSMC CLN90LP 90nm Deskew PLL - 120MHz-600MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
1473
1.0
TSMC CLN90LP 90nm Deskew PLL - 240MHz-1200MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
1474
1.0
TSMC CLN90LP 90nm Deskew PLL - 60MHz-300MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
1475
1.0
TSMC CLN90LP 90nm General Purpose PLL - 120MHz-600MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...
1476
1.0
TSMC CLN90LP 90nm Spread Spectrum PLL - 120MHz-600MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
1477
1.0
TSMC CLN90LP 90nm Spread Spectrum PLL - 240MHz-1200MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
1478
1.0
TSMC CLN90LP 90nm Spread Spectrum PLL - 60MHz-300MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
1479
1.0
GSMC RF 0.18um 1.8V APLL
This IP is a programmable Analog PLL suitable for high speed clock generation. High speed VCO can run from 300MHz to 600MHz. By setting DM[4:0] and DN...
1480
1.0
CSMC13V33 process DUPIO, This library includes analog I/O cells and digital I/O cells and supports Inline DUP I/O pad.
VeriSilicon CSMC 0.13μm 1.2V/3.3V DUP I/O Cell Library developed by VeriSilicon is optimized for Central Semiconductor Manufacturing Corporation (CSMC...
1481
1.0
GSMC16RF process VPPIO, provides 6.5V power supply IO pads for OTP application.
VeriSilicon GSMC 0.16um RF 1.8V/3.3V VPPIO_DUP_01 IO library developed by VeriSilicon is optimized for Grace Semiconductor Manufacturing Corporation (...
1482
1.0
DSO65: 2.5V GPIO with 2Gbps LVDS TX/RX & analog/RF, GlobalFoundries 65nm LPe
A silicon-proven wirebond I/O library in GlobalFoundries 65nm LPe with a 2.5V GPIO (dual drive strength, independent input/output enable), 2Gbps LVDS ...
1483
1.0
ST28nm LVDS Transmitter
The LVDS transmitter is designed to support Single Link transmission between Host and Flat Panel Display with up to SXGA+ resolution and Dual Link tra...
1484
1.0
Standard Cell Library in SkyWater 90nm
This Standard Cell Library in SkyWater 90nm (S90 / C9) CMOS process is a low-leakage digital standard cell library that targets power-efficient and lo...
1485
1.0
Huali 28nm HKCP process Multiple Power Supply IO library
The Multiple I/O Library supports both 2.5V analog IO cells & 3.3V digital IO cells. Digital IO contains 5V tolerance, open-drain & OSC cells. This li...
1486
1.0
Sub-LVDS receiver followed by 1:4 de-serializer
The S13V25_CCP2RX _01 recovers a serial bit stream containing image data and converts it to a 4-bit 1/4 rate word. The receiver defined in this IP is ...
1487
1.0
audio clock Generation, output nine kinds of 256*fs from 12M reference input
This PLL is designed for audio clock generation. The reference clock is 12MHz crystal or input clock. It supports 256*fs clock output, here fs is audi...
1488
1.0
5V ESD Clamp in GlobalFoundries 180nm LPe
5V, ESD clamp in GlobalFoundries 180nm that can be used for either signal protection or 1.8V Power supplies. The clamp is a compact single cell, 44um ...
1489
1.0
NV110/IC110: 1.2V/3.3V fail-safe GPIO with 3.3V I2C ODIO & SPI, TSMC 110nm
A silicon-proven I/O library in TSMC 110nm, available in wirebond (NV110) and flip-chip (IC110) variants, built to fill gaps in the native foundry I/O...
1490
1.0
AV55: Low-Capacitance RF ESD Cell Library, TSMC 55nm LP
A production-quality, silicon-proven ESD library in TSMC 55nm LP — not a full I/O, but a collection of standalone, low-capacitance ESD cells for RF an...
1491
1.0
LVDS
This IP is a high-speed LVDS (Low-Voltage Differential Signaling) transceiver supporting multi-channel joint. The LVDS TX & RX IP is specified for ope...
1492
1.0
LVDS receiver, 650M, 5 channel
The LVDS Receiver IP is designed to support Single Link transmission between Host and Flat Panel Display with up to SXGA+ resolution and Dual Link tra...
1493
1.0
LVDS TX
...
1494
1.0
VY55: 3.3V GPIO with 1.2V & 5V tolerent ODIO, GlobalFoundries 55nm
A production-quality wirebond I/O library in GlobalFoundries 55nm. It offers a 3.3V fail-safe GPIO (two selectable inputs, slew-rate control, optional...
1495
1.0
VZ55: 1.8V/3.3V GPIO with I2C ODIO, analog I/O, GlobalFoundries 55nm
A production-ready I/O library on GlobalFoundries 55nm CMOS, delivering a full digital and analog I/O suite with 2kV HBM / 500V CDM ESD and latch-up i...
1496
0.3729
A memory BIST solution which has been optimized for Dolphin memories
Dolphin Technology now provides a memory BIST solution which has been optimized for Dolphin memories. It supports all Dolphin memory compilers, includ...
1497
0.3729
2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, supports process G/LV
Memory Compilers...
1498
0.3729
2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, supports process GC
Memory Compilers...
1499
0.3729
2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF
Memory Compilers...
1500
0.3729
2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF
Memory Compilers...