Design & Reuse
Catalog of SIP Cores
System on Chip design resources
2828 IP
201
5.0
Radiation-Hardened GPIO, ODIO and LVDS Interface in SkyWater 90nm
This Library, developed on SkyWater 90nm CMOS, delivers a radiation-hardened suite of robust interfaces covering general-purpose, open-drain, and high...
202
5.0
AD16: 1.8V/3.3V Flip-chip I/O Library with I2C ODIO & 5V HPD, TSMC 16nm
A production-quality, silicon-proven flip-chip I/O library in TSMC 16nm with multi-voltage GPIO (1.8V or 3.3V, dynamically selectable) and 4kV HBM ESD...
203
5.0
Memory Compiler(12nm,16nm,22nm,28nm,40nm,55nm, 90nm, 115nm, 130nm, 150nm, 180nm)
M31 memory compilers are designed with high industrial standards to which provides the memory solutions for density, power, and performance optimizati...
204
5.0
General Purpose I/O (GPIO)(12nm,16nm,22nm, 28nm, 40nm, 55nm, 90nm, 110nm, 130nm, 150nm,152nm, 180nm)
GPIO is a general-purpose input/output unit that provides basic input/output functionalities. M31 provides silicon-proven GPIO libraries in a variety ...
205
5.0
AF12: 1.8V/3.3V Flip-chip I/O library with I2C ODIO & 5V Hot-Plug Detect, TSMC 12nm
A production-quality, silicon-proven flip-chip I/O library in TSMC 12nm with multi-voltage GPIO (1.8V or 3.3V, dynamically selectable) and 4kV HBM ESD...
206
5.0
UF16: Switchable 1.8V/3.3V GPIO Library with 5V ODIO, OTP & analog, TSMC 16nm
A flip-chip I/O library in TSMC 16nm (FFC/FFC+) that detects and dynamically adapts to a 1.8V or 3.3V VDDIO supply during operation. The GPIO configur...
207
5.0
EG22: 1.8V/3.3V GPIO Library with 5V ODIO, HDMI, LVDS & analog cells, TSMC 22nm
A silicon-proven, inline flip-chip-compatible I/O library in TSMC 22nm with a two-speed GPIO (75MHz and 150MHz), 5V open-drain I/O, and dedicated HDMI...
208
5.0
VG22: 1.8V/3.3V multi-voltage GPIO library with 5V ODIO & analog, TSMC 22nm
A silicon-proven inline wirebond I/O library in TSMC 22nm with dynamic 1.8V/3.3V multi-voltage GPIO (25/75/150MHz), 5V fail-safe open-drain I/O, and a...
209
5.0
OG22: Three-speed 1.8V/3.3V GPIO Library with I2C ODIO, TSMC 22nm
A silicon-proven, inline flip-chip-compatible I/O library in TSMC 22nm with three speed-graded GPIOs (25/75/150MHz) and an I2C-compliant open-drain I/...
210
5.0
MH12: Hardened 1.8V/3.3V GPIO & power library with integrated POC, TSMC 12nm
A production-ready flip-chip I/O library in TSMC 12nm (FFC/FFC+) built around hardened 1.8V/3.3V GPIOs with programmable drive strength, input hystere...
211
5.0
PM22: Ultra-low leakage 1.8V GPIO with I2C ODIO & Analog, TSMC 22nm ULL
An ultra-low-leakage I/O library in TSMC 22nm ULL: the GPIO leaks just ~150pA from VDDIO and ~1nA typical from VDD. It pairs a configurable input/outp...
212
5.0
MM22: Ultra-low leakage dynamic 1.8/3.3V GPIO Library with I2C ODIO & analog, up to xSPI400, TSMC 22nm ULL
An ultra-low-leakage I/O library in TSMC 22nm ULL with a dynamic 1.8–3.3V GPIO that auto-adapts across the supply range with no manual mode switching....
213
5.0
SN12: 5V Generic I/O & ESD protection Library (>8kV HBM / 8A), TSMC 12nm
A base set of ESD protection structures for I/O and power supplies in TSMC 12nm FFC/FFC+, targeting up to 8A (>8kV HBM). The cells trigger and protect...
214
5.0
Inline CUP I/O
The inline CUP I/O library provide 3.3V bi- directional I/O cells with pull -up, pull-down features, Schmitt trigger and a range of drive strengths....
215
5.0
Integrated ESD cell designs for General I/O, eMMC I/Os, SDIOs, and ONFI I/O(12nm~180nm)
M31’s I/O Libraries now include integrated ESD cell designs for General I/O, eMMC I/Os, SDIOs, and ONFI I/O. We provide standard JEDEC ESD level and c...
216
5.0
IO Library - GlobalFoundries 22FDX
The general purpose 22FDX® IO Library features a rich set of digital and analog IO cells covering 1.2 V to 1.8 V I/O standards and 0.4 V to 0.8 V core...
217
5.0
Special I/O-eMMC/SDIO (22nm, 28nm, and 40nm)
SD (Secureity Digital) and eMMC (embedded MultiMedia Card) I/Os are non-volatile memory interface technologiesy with high bandwidth capabilities, whic...
218
5.0
VR13: Radiation-hardened wirebond I/O library with 3.3V GPIO, LVDS, I2C ODIO, analog & OTP, TSMC 130nm
A silicon-proven, radiation-hardened wirebond I/O library in TSMC 130nm, rated for an extended −50°C to 200°C range with sleep-retention and a built-i...
219
5.0
RS16: Controlled-impedance multi-protocol I/O Library (HP, HV & RCAL macros), TSMC 16nm
A high-performance, flip-chip I/O library in TSMC 16FFC/FFC+ for high-speed digital and mixed-signal designs, offering single-ended and differential I...
220
5.0
Standard Cell Library in TSMC (12nm~180nm)
M31 provides a variety of cell libraries, including Ultra-High Density Standard Cell Library (HDSC), General Purpose Standard Cell library (GPSC), Ult...
221
4.0
Flash Memory LDPC
LDPC corrects errors caused by flash storage failure mechanisms. The data is encoded while writing into the storage devices and it is decoded while re...
222
3.0
7 track Extra Low Consumption standard cell library with Dual voltage capability (1.8 V / 1.1 V)
TSMC 180 G, SESAME eLC DV is specifically designed to enable robust dual voltage operation, with characterizations taking into account physical phenom...
223
3.0
9 track standard cell library at TSMC 55 nm
Foundry Sponsored, TSMC 55 uLPeF Sesame 9T a unique architecture based on 9-track cells, optimized for High Density and Low Dynamic Power allowing use...
224
3.0
9 track standard cell library at TSMC 55 nm
Foundry Sponsored, TSMC 55 uLP, Sesame 9T, a unique architecture based on 9-track cells, optimized for High Density and Low Dynamic Power allowing use...
225
3.0
6 track Ultra High Density standard cell library at TSMC 55 nm
Foundry Sponsored, TSMC 55 LeFP, SESAME uHD for ultra high-density logic design thanks to 6-track cells combined with pulsed latch cells acting as spi...
226
3.0
12 track thick oxide standard cell library at TSMC 40 - low leakage and direct battery connection (operating voltages from 1.1 V to 3.3 V)
SESAME BiV 40 uLP a new thick oxyde based standard cell library for ultra low leakage logic design and/or direct battery connection through the use of...
227
3.0
12 track thick oxide standard cell library at TSMC 40 - low leakage and direct battery connection (operating voltages from 1.1 V to 3.3 V)
SESAME BiV 40 uLPeFlash a new thick oxyde based standard cell library for ultra low leakage logic design and/or direct battery connection through the ...
228
3.0
12 track thick oxide standard cell library at TSMC 40 - low leakage and direct battery connection (operating voltages from 1.1 V to 3.3 V)
TSMC 40 LPeF, SESAME BiV, a new thick oxyde based standard cell library for ultra low leakage logic design and/or direct battery connection through th...
229
3.0
12 track thick oxide standard cell library at TSMC 40 - low leakage and direct battery connection (operating voltages from 1.1 V to 3.3 V)
SESAME BiV 40 LP a new thick oxyde based standard cell library for ultra low leakage logic design and/or direct battery connection through the use of ...
230
3.0
Metal programmable ROM compiler - Memory optimized for low power - compiler range up to 1024 k
Metal programmable ROM compiler - TSMC 90 nm LP - Non volatile memory optimized for low power - compiler range up to 1024 k...
231
3.0
Metal programmable ROM compiler - Memory optimized for low power and high density - compiler range up to 1024 k
Metal programmable ROM compiler - TSMC 152 nm LP - Non volatile memory optimized for low power and high density - compiler range up to 1024 k...
232
3.0
Metal programmable ROM compiler - Memory optimized for low power and high density - Dual Voltage - compiler range up to 1024 k
Metal programmable ROM compiler - TSMC 152 nm G - Non volatile memory optimized for low power and high density - Dual Voltage - compiler range up to 1...
233
3.0
Metal programmable ROM compiler - Memory optimized for low power and high density - Dual Voltage - compiler range up to 1024 k
Metal programmable ROM compiler - TSMC 180 nm G - Non volatile memory optimized for low power and high density - Dual Voltage - compiler range up to 1...
234
3.0
Metal programmable ROM compiler - Memory optimized for low power and high density - Dual Voltage - compiler range up to 1024 k
Metal programmable ROM compiler - TSMC 180 nm eLL - Non volatile memory optimized for low power and high density - Dual Voltage - compiler range up to...
235
3.0
Single Port Register File compiler - Memory optimized for high density and high speed - compiler range up to 40 k
Single Port Register File compiler - TSMC 55 nm LP - Memory optimized for high density and high speed - compiler range up to 40 k...
236
3.0
Single Port Register File compiler - Memory optimized for high density and high speed - compiler range up to 40 k
Single Port Register File compiler - TSMC 65 nm LP - Memory optimized for high density and high speed - compiler range up to 40 k...
237
3.0
Single Port Register File compiler - Memory optimized for high density and high speed - compiler range up to 40 k
Foundry sponsored - Single Port Register File compiler - TSMC 90 nm LPeF - Memory optimized for high density and high speed - compiler range up to 40 ...
238
3.0
Single Port Register File compiler - Memory optimized for high density and speed - Dual Voltage - compiler range up to 40 k
Foundry sponsored - Single Port Register File compiler - TSMC 90 nm uLL - high density - Dual Voltage - compiler range up to 40 k...
239
3.0
Single Port Register File compiler - Memory optimized for high density and speed - Dual Voltage - Compiler range up to 40 kbits
Single Port Register File compiler - TSMC 90 nm uLL - Memory optimized for high density and speed - Dual Voltage - Compiler range up to 40 kbits...
240
3.0
Single Port Register File compiler - Memory optimized for ultra high density and high speed - compiler range up to 20 k
Foundry Sponsored - Single Port Register File compiler - TSMC 110 nm HV_1.5V_5V - Memory optimized for ultra high density and high speed - compiler ra...
241
3.0
Single Port Register File compiler - Memory optimized for ultra high density and high speed - compiler range up to 20 k
Single Port Register File compiler - TSMC 110 nm HV_1.5V_5V_32V - Memory optimized for ultra high density and high speed - compiler range up to 20 k...
242
3.0
Single Port SRAM compiler - Memory optimized for high density and low power - compiler range up to 320 k
Single Port SRAM compiler - TSMC 55 nm LPeF - Memory optimized for high density and Low power - compiler range up to 320 k...
243
3.0
Single Port SRAM compiler - Memory optimized for high density and low power - compiler range up to 320 k
Single Port SRAM compiler - TSMC 110 nm HV_1.5V_5V_32V - Memory optimized for high density and low power - compiler range up to 320 k...
244
3.0
Single Port SRAM compiler - Memory optimized for high density and speed - Dual Voltage - Compiler range up to 640 kbits
Single Port SRAM compiler - TSMC 90 nm uLL - Memory optimized for high density and speed - Dual Voltage - Compiler range up to 640 kbits...
245
3.0
Single Port SRAM compiler - Memory optimized for ultra high density and low power - 3ML- compiler range up to 320 k
Foundry sponsored - Single Port SRAM compiler - TSMC 55 nm HV - Memory optimized for ultra high density and low power - 3ML- compiler range up to 320 ...
246
3.0
Single Port SRAM compiler - Memory optimized for ultra low power and high density - Dual Voltage - compiler range up to 512 k
Single Port SRAM compiler - TSMC 180 nm uLL - Memory optimized for ultra low power and high density - Dual Voltage - compiler range up to 512 k...
247
3.0
sROMet compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 1M
Foundry sponsored - sROMet compiler - TSMC 55 nm uLP - Non volatile memory optimized for high density and low power - Dual Voltage - compiler range up...
248
3.0
sROMet compiler - TSMC 40 nm uLPeFlash - Non volatile memory optimized for high density and low power - Dual Voltage - compiler range up to 1M
sROMet compiler - TSMC 40 nm uLPeFlash - Non volatile memory optimized for high density and low power - Dual Voltage - compiler range up to 1M...
249
3.0
Dual Port SRAM compiler - Memory optimized for high density and low power - compiler range up to 80 k
Foundry sponsored - Dual Port SRAM compiler - TSMC 90 nm LPeF - Memory optimized for high density and low power - compiler range up to 80 k...
250
3.0
Dual Port SRAM compiler - Memory optimized for high density and low power - Dual Rail - compiler range up to 288 k
Dual Port SRAM compiler - TSMC 40 nm uLP - Memory optimized for high density and low power - Dual Rail - compiler range up to 288 k...