Design & Reuse
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2801 IP
201
5.0
1:6 Fixed Length Visually Lossless Compression/Decompression
Suppressing the degradation of image quality by the original comp./decomp. processing, drastic reductions of Memory amount and Bandwidth could be real...
202
5.0
1:6 Fixed Length Visually Lossless Compression/Decompression
Suppressing the degradation of image quality by the original comp./decomp. processing, drastic reductions of Memory amount and Bandwidth could be real...
203
5.0
Memory Compiler(12nm,16nm,22nm,28nm,40nm,55nm, 90nm, 115nm, 130nm, 150nm, 180nm)
M31 memory compilers are designed with high industrial standards to which provides the memory solutions for density, power, and performance optimizati...
204
5.0
General Purpose I/O (GPIO)(12nm,16nm,22nm, 28nm, 40nm, 55nm, 90nm, 110nm, 130nm, 150nm,152nm, 180nm)
GPIO is a general-purpose input/output unit that provides basic input/output functionalities. M31 provides silicon-proven GPIO libraries in a variety ...
205
5.0
Inline CUP I/O
The inline CUP I/O library provide 3.3V bi- directional I/O cells with pull -up, pull-down features, Schmitt trigger and a range of drive strengths....
206
5.0
eNOR embedded Flash embedded IP
Zhuhai Chuangfeixin’s Floating-gate eNOR Flash memory macro are silicon characterized and qualified on Huali Microelectronics Corporation 65nm Floati...
207
5.0
Integrated ESD cell designs for General I/O, eMMC I/Os, SDIOs, and ONFI I/O(12nm~180nm)
M31’s I/O Libraries now include integrated ESD cell designs for General I/O, eMMC I/Os, SDIOs, and ONFI I/O. We provide standard JEDEC ESD level and c...
208
5.0
IO Library - GLOBALFOUNDRIES 22FDX
The general purpose 22FDX® IO Library features a rich set of digital and analog IO cells covering 1.2 V to 1.8 V I/O standards and 0.4 V to 0.8 V core...
209
5.0
Special I/O-eMMC/SDIO (22nm, 28nm, and 40nm)
SD (Secureity Digital) and eMMC (embedded MultiMedia Card) I/Os are non-volatile memory interface technologiesy with high bandwidth capabilities, whic...
210
5.0
Standard Cell Library in TSMC (12nm~180nm)
M31 provides a variety of cell libraries, including Ultra-High Density Standard Cell Library (HDSC), General Purpose Standard Cell library (GPSC), Ult...
211
5.0
OTP IP
Zhuhai Chuangfeixin (CFX) offers two proprietary OTP technologies and respective silicon IPs：One is Anti-fuse, the other is floating gate. CFX OTP ...
212
5.0
OTP One Time Programmable IP HHGrace 55HV
Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...
213
5.0
OTP One Time Programmable IP HHGrace 55LP
Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...
214
5.0
OTP One Time Programmable IP HHGrace 90BCD
Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...
215
5.0
OTP One Time Programmable IP HLMC 55CIS
Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...
216
5.0
OTP One Time Programmable IP Nexchip 110HV
Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...
217
5.0
OTP One Time Programmable IP Nexchip 110LP2
Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...
218
5.0
OTP One Time Programmable IP Nexchip 55HV_6V
Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...
219
5.0
OTP One Time Programmable IP Samsung 90CIS
Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...
220
5.0
OTP One Time Programmable IP SIL130HV
Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...
221
5.0
OTP One Time Programmable IP SIL180
Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...
222
5.0
OTP One Time Programmable IP Silterra 160HV
Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...
223
5.0
OTP One Time Programmable IP SMIC 153nm
Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...
224
5.0
OTP One Time Programmable IP SMIC 28HV
Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...
225
5.0
OTP One Time Programmable IP SMIC 55HV
Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...
226
5.0
OTP One Time Programmable IP SMIC130
Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...
227
5.0
OTP One Time Programmable IP XMC 55LL
Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...
228
4.0556
A 3.3V Wirebond I/O Library with 8kV HBM ESD, a 1.2Gbps LVDS Tx, and I2C compliant ODIO
The I/O Library is a silicon-proven I/O IP suite for Tower 65 nm CMOS, supporting 1.2 V core and 3.3 V I/O operation with a standard 7M1L1F metal stac...
229
4.0556
A GlobalFoundries 65nm Wirebond IO library with 2.5V GPIO, LVDS TX & RX and 2.5V analog / RF
Key attributes of the GlobalFoundries 65nm IO library are dual selectable drive strengths and independent input & output enable / disable. The GPIO ce...
230
4.0556
A GlobalFoundries 65nm/55nm Wirebond IO Library with 1.2V to 3.3V GPIO and 5V ODIO
Full Custom IO Library. Multi-voltage GPIO Library. Includes 5V Open-Drain; precision PWM Output, 1.2V to 3.3V GPIOs and Analog/RF IOs. Also include ...
231
4.0556
A radiation-hardened GlobalFoundries 12nm LP/LP+ 0.8V LVDS Transceiver
Certus Semiconductor’s 2.5Gbps LVDS transceiver in GlobalFoundries LP/LP+ is designed for high-speed, low-power data transmission in radiation-intensi...
232
4.0556
A radiation-hardened GlobalFoundries 12nm LP/LP+ 0.8V SLVS Transceiver
This SLVS I/O Library delivers a robust, high-performance solution for high-speed differential signaling in GlobalFoundries 12nm process technology. D...
233
4.0556
6.5V ESD Clamp in TSMC180nm Technology
Standalone 6.5V ESD Power Clamp in 180nm technology for use in wirebond or flipchip....
234
4.0556
1.8V & 3.3V Radiation Hardened GPIO with Optimized LDO in GlobalFoundries 12 LP/LP+
This radiation-hardened, by design, library features both a 1.8 and 3.3V GPIO with multiple drive strengths of 2mA, 4mA,8mA, and 16mA, along with a fu...
235
4.0556
1.8V/3.3V Switchable GPIO With 5V I2C Open - Drain & Analog Cells in Samsung 11nm LPP
SAMSUNG 11nm Flip-Chip IO library with dynamically switchable 1.8V/3.3V GPIO with fail-safe capability, 5V I2C / SMBUS open-drain cell, 5V OTP cell, 1...
236
4.0556
I/O Library in DBHiTek 130nm featuring a 5V Fail-Safe GPIO, 5V GPIO, 5V GPI and I2C-Compliant 5V ODIO
This flip-chip compatible library in Dongbu HiTek 130nm features a fail-safe GPIO, two standard GPIOs, a 5V GPI, and 5V I2C-compliant ODIO. The GFGPIO...
237
4.0556
I/O Library with 1.5V to 3.3V GPIO in GlobalFoundries 180 BCDLite
This silicon-proven, wirebond library in GlobalFoundries 180nm BCD lite is a specialty I/O similar to Soundwire. Featuring a 1.5V to 3.3V GPIO, as wel...
238
4.0556
Secure Digital I/O offerings
Certus is pleased to offer Secure Digital compliant IOs in advanced technology nodes. Our SD IOs support DS, HS, SDR25, SDR50, DDR50 and SDR104 prot...
239
4.0556
RGMII I/O offerings
Certus is pleased to offer Reduced Gigabit Media Independent Interface (RGMII) compliant IOs in advanced technology nodes. The Certus solutions suppo...
240
4.0556
High-voltage solutions in baseline TSMC and GlobalFoundries technology
Certus is pleased to offer High-voltage ESD solutions across multiple baseline technologies. Distinguishing Certus is our ability to provide high-vol...
241
4.0556
IO & ESD solutions supporting GPIO, I2C,RGMII, SD, LVDS, HDMI & analog/RF across multiple technology nodes
Certus Semiconductor has a long history of working across a broad range of technology nodes from 180nm down to the latest FinFet offerings. Our I/O s...
242
4.0556
Specialized 1.2V to 3.3V Fail-Safe GPIO and 3.3V I2C Open-Drain in DBHiTek 110nm
This silicon-proven Wirebond compatible library in Dongbu HiTek 110nm features a multi-voltage, multi-standard General Purpose Input Output with an Op...
243
4.0556
Specialized Analog I/O Library in GlobalFoundires 55nm LPx
This I/O library is a silicon-proven, flip-chip-optimized analog and mixed-signal I/O Library for GlobalFoundries 55nm BCD technology. It provides a c...
244
4.0556
5V ESD Clamp in GlobalFoundries 180nm LPe
5V, ESD clamp in GlobalFoundries 180nm that can be used for either signal protection or 1.8V Power supplies. The clamp is a compact single cell, 44um ...
245
4.0556
LVDS RX & TX IOs in multiple foundry technology
Certus provides full LVDS RX & TX IOs in GlobalFoundries and other foundry technologies. The Certus LVDS solutions are ANSI/TIA/EIA-644-A compliant a...
246
4.0
Flash Memory LDPC
LDPC corrects errors caused by flash storage failure mechanisms. The data is encoded while writing into the storage devices and it is decoded while re...
247
3.0
7 track Extra Low Consumption standard cell library with Dual voltage capability (1.8 V / 1.1 V)
TSMC 180 G, SESAME eLC DV is specifically designed to enable robust dual voltage operation, with characterizations taking into account physical phenom...
248
3.0
9 track standard cell library at TSMC 55 nm
Foundry Sponsored, TSMC 55 uLPeF Sesame 9T a unique architecture based on 9-track cells, optimized for High Density and Low Dynamic Power allowing use...
249
3.0
9 track standard cell library at TSMC 55 nm
Foundry Sponsored, TSMC 55 uLP, Sesame 9T, a unique architecture based on 9-track cells, optimized for High Density and Low Dynamic Power allowing use...
250
3.0
6 track Ultra High Density standard cell library at TSMC 55 nm
Foundry Sponsored, TSMC 55 LeFP, SESAME uHD for ultra high-density logic design thanks to 6-track cells combined with pulsed latch cells acting as spi...