Company
design-reuse.com
D&R China
Blogs
Industry Articles
D&R Events
IP-SoC Days 2026
IP-SoC Days 2025
IP-SoC Days 2024
IP-SoC Days 2023
IP-SoC Days 2022
IP-SoC 2025
IP-SoC 2024
IP-SoC 2023
IP-SoC 2022
Videos
Subscribe to D&R SoC News Alert
English
Mandarin
Register
Login
Menu
Home
Search IP Core
News
Blogs
Articles
D&R Events
Videos
Subscribe to D&R SoC News Alert
Register
Login
News
Center
Foundation IP
Analog IP
Interface IP
Interconnect IP
Memory Controller & PHY
Peripheral Controller
Wireless IP
Wireline IP
Processor IP
RISC-V
AI Core
Automotive IP
Security IP
IoT
Media IP
Avionics / Space IP
Verification IP
Verification Platform
Design Platform
Asic & IP Design Center
IP-SoC Days
IP-SoC Days 2026
IP-SoC Days 2025
IP-SoC Days 2024
IP-SoC Days 2023
IP-SoC Days 2022
IP-SoC 2025
IP-SoC 2024
IP-SoC 2023
IP-SoC 2022
Browse Foundation
Arithmetic & Mathematic (46)
Embedded Memories (989)
I/O Library (1031)
Standard cell (735)
CAM (30)
Diffusion ROM (3)
DRAM (1)
Dual-Port SRAM (30)
EEPROM (30)
Flash Memory (36)
FTP (8)
Metal ROM (1)
MTP (38)
OTP (164)
RAM (237)
Register File (240)
ROM (76)
RRAM (1)
Single-Port SRAM (48)
Via ROM (26)
Other (20)
ESD Protection (72)
General-Purpose I/O (GPIO) (430)
High-speed (149)
LVDS (75)
Memory Interfaces (16)
Special (289)
You must be registered with the D&R website to view the full search results, including:
Complete datasheets for
IP Core
products
Contact information for
IP Core
suppliers
Please
log in
here to your account.
New user ?
Signup here
.
2801 IP
2351
0.118
Standard Cell PowerSlash(TM) Library IP, UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG process FSC0H_J POWERSLASHKit core Library....
2352
0.118
Standard Cell PowerSlash(TM) Library IP, UMC 0.13um LL/FSG process
UMC 0.13um LL FSG Logic process high density POWERSLASH Core Cell Library....
2353
0.118
Standard Cell PowerSlash(TM) Library IP, UMC 0.13um SP/FSG process
UMC 0.13um SP FSG Logic process high density POWERSLASH Core Cell Library....
2354
0.118
Dual Port SRAM Compiler IP, High density, (2RW), UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG Logic process high density synchronous Dual Port (2RW) SRAM memory compiler....
2355
0.118
Dual Port SRAM Compiler IP, Output: 1.8432MHz, UMC 40nm LP process
UMC 40nm LP Logic process synchronous high density Dual Port SRAM memory compiler....
2356
0.118
Dual Port SRAM Compiler IP, Support Repair Features, UMC 40nm LP process
UMC 40nm Logic process synchronous high density Dual Port SRAM memory compiler with redundancy....
2357
0.118
Dual Port SRAM Compiler IP, Support Repair Features, UMC 55nm eHV process
UMC 55nm eHV process, Dual Port SRAM compiler with row redundancy option....
2358
0.118
Dual Port SRAM Compiler IP, Support Repair Features, UMC 55nm LP process
UMC 55nm LP Logic process Synchronous Dual Port SRAM with redundancy feature....
2359
0.118
Dual Port SRAM Compiler IP, Support Repair Features, UMC 55nm SP process
UMC 55nm SP Low-K Logic process Low Power synchronous high density Dual Port SRAM memory compiler with redundancy....
2360
0.118
Dual Port SRAM Compiler IP, Support Repair Features, UMC 55nm SP process
UMC 55nm 1.0V Standard Performance (SP) Low-K Logic process synchronous, high density, Dual Port SRAM with row redundancy option....
2361
0.118
Dual Port SRAM Compiler IP, Support Repair Features, UMC 65nm LL process
UMC 65nm low leakage RVT Logic Low_K process synchronous high density Dual Port SRAM memory compiler with redundancy elements and bist testing interfa...
2362
0.118
Dual Port SRAM Compiler IP, Support Repair Features, UMC 65nm LL process
UMC 65nm low leakage RVT Logic Low_K process synchronous high density Dual Port SRAM memory compiler wiht redundancy elements....
2363
0.118
Dual Port SRAM Compiler IP, Support Repair Features, UMC 65nm SP process
UMC 65nm SP/RVT Logic and HVT Low-K process synchronous, high density, Dual Port SRAM compiler with the row redundancy option....
2364
0.118
Dual Port SRAM Compiler IP, UMC 0.11um eFlash/HS process
UMC 0.11um eFlash HS process, Dual Port SRAM compiler....
2365
0.118
Dual Port SRAM Compiler IP, UMC 0.11um eFlash/LL process
UMC 0.11um eFlash LL process Dual Port SRAM compiler....
2366
0.118
Dual Port SRAM Compiler IP, UMC 0.11um HS/AE process
UMC 0.11um HS/AE Logic process synchronous High-density Dual Port SRAM memory compiler....
2367
0.118
Dual Port SRAM Compiler IP, UMC 0.11um HS/FSG process
UMC 0.11um HS/RVT Logic process synchronous high density Dual Port SRAM memory compiler....
2368
0.118
Dual Port SRAM Compiler IP, UMC 0.11um LL process
UMC 0.11um low leakage Logic process synchronous high density Dual Port SRAM memory compiler....
2369
0.118
Dual Port SRAM Compiler IP, UMC 0.11um LL/AE process
UMC 0.11um LL/AE (AL Advanced Enhancement) Logic process synchronous high density Dual Port SRAM memory compiler....
2370
0.118
Dual Port SRAM Compiler IP, UMC 0.11um SP process
UMC 0.11um SP/AE (AL Advance Enhancement) Logic process synchronous High-density Dual Port SRAM memory compiler....
2371
0.118
Dual Port SRAM Compiler IP, UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG Logic process Synchronous high density Dual Port SRAM memory compiler with input wrapper Mux....
2372
0.118
Dual Port SRAM Compiler IP, UMC 0.13um HS/FSG process
UMC 0.13um HS/LL fusion (FSG) process high density synchronous high density Dual Port (2RW) SRAM memory compiler....
2373
0.118
Dual Port SRAM Compiler IP, UMC 0.13um LL process
UMC 0.13um LL Logic/FSG process high density synchronous high density Dual Port (2RW) SRAM memory compiler....
2374
0.118
Dual Port SRAM Compiler IP, UMC 0.13um SP/FSG process
UMC 0.13um SP/FSG Logic process high density synchronous high density Dual Port (2RW) SRAM memory compiler....
2375
0.118
Dual Port SRAM Compiler IP, UMC 0.153um MS process
UMC 153nm Mixed-Mode/Logic process synchronous high density Dual Port SRAM memory compiler....
2376
0.118
Dual Port SRAM Compiler IP, UMC 0.18um eFlash/G2 process
UMC 0.18um eFlash GII Logic process high density Dual Port SRAM compiler....
2377
0.118
Dual Port SRAM Compiler IP, UMC 0.18um G2 process
UMC 0.18um GII Logic process synchronous high density Dual Port (2RW) SRAM memory compiler....
2378
0.118
Dual Port SRAM Compiler IP, UMC 0.18um G2 process
UMC 0.18um GII Logic process synchronous high density Dual Port (2RW) SRAM memory compiler....
2379
0.118
Dual Port SRAM Compiler IP, UMC 0.18um MS process
UMC 0.18um MM/RF process synchronous high density Dual Port SRAM memory compiler....
2380
0.118
Dual Port SRAM Compiler IP, UMC 28nm HLP process
UMC 28nm HLP/ Low-K Dual Port SRAM compiler....
2381
0.118
Dual Port SRAM Compiler IP, UMC 28nm HLP process
UMC 28nm HLP Logic process, Dual Port SRAM compiler with LVT....
2382
0.118
Dual Port SRAM Compiler IP, UMC 28nm HLP process
UMC 28nm HLP Logic process, Dual Port SRAM compiler with R1....
2383
0.118
Dual Port SRAM Compiler IP, UMC 55nm eHV process
UMC 55nm eHV process, Dual Port SRAM compiler....
2384
0.118
Dual Port SRAM Compiler IP, UMC 55nm LP process
UMC 55nm LP Logic process Synchronous Dual Port SRAM memory compiler....
2385
0.118
Dual Port SRAM Compiler IP, UMC 55nm LP process
UMC 55nm LP/ Low-K process with row Redundancy Dual Port SRAM compiler....
2386
0.118
Dual Port SRAM Compiler IP, UMC 55nm SP process
UMC 55nm SP Low-K Logic process Low Power synchronous high density Dual Port SRAM memory compiler....
2387
0.118
Dual Port SRAM Compiler IP, UMC 55nm SP process
UMC 55nm SP Low-K Logic process synchronous Dual Port RAM memory compiler....
2388
0.118
Dual Port SRAM Compiler IP, UMC 65nm LL process
UMC 65nm low leakage RVT Logic Low_K process synchronous high density Dual Port SRAM memory compiler with bist testing interface....
2389
0.118
Dual Port SRAM Compiler IP, UMC 65nm LL process
UMC 65nm low leakage RVT Logic Low_K process synchronous high density Dual Port SRAM memory compiler....
2390
0.118
Dual Port SRAM Compiler IP, UMC 65nm SP process
UMC 65nm 1.0V SP Low-K Logic process synchronous high density Dual Port SRAM compiler (with row redundancy option)....
2391
0.118
Dual Port SRAM Compiler IP, UMC 90nm LL process
UMC 90nm LL/RVT Low-K Logic process Synchronouslow AC power Dual Port SRAM....
2392
0.118
Dual Port SRAM Compiler IP, UMC 90nm LL process
UMC 90nm LL/RVT Synchronous high density Dual Port SRAM memory compiler....
2393
0.118
Dual Port SRAM Compiler IP, UMC 90nm SP process
UMC 90nm SP/RVT/ Low-K process synchronous Dual Port SRAM compiler....
2394
0.118
Fujitsu 90mm LL-HS process MPCA core cell library [Minimum progeamming layer = M3/4/5 (MUST thin metal layers)]
Fujitsu 90mm LL-HS process MPCA core cell library [Minimum progeamming layer = M3/4/5 (MUST thin metal layers)]...
2395
0.118
Fujitsu 90nm LL-UHS process MPCA M345 core cell library
Fujitsu 90nm LL-UHS process MPCA M345 core cell library...
2396
0.118
Multi-Voltage IO IP, 1.8V/2.5V/3.3V Operations, UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG Logic process Multi-Voltage metal programmable IO Cell Library....
2397
0.118
Multi-Voltage IO IP, BOAC (Bonding Over Active Circuit), UMC 0.15um SP process
UMC 0.15um SP process standard Multi-Voltage IO....
2398
0.118
Multi-Voltage IO IP, BOAC (Bonding Over Active Circuit), UMC 0.18um LL process
UMC 0.18um LL Logic process standard Multi-Voltage IO....
2399
0.118
LVDS Receiver IP, 8MHz - 135MHz, UMC 0.13um SP/FSG process
2.5V LVDS Receiver 8~135MHz, UMC 90nm SP process....
2400
0.118
LVDS Receiver IP, 20MHz - 135MHz , UMC 0.18um G2 process
DLL-based LVDS RX, VCC=3.3 for 20M~135MHz and VCC=2.5 for 20M~100MHz operation frequency, UMC 0.13um HS FSG Logic process....
|
Previous
|
48
|
49
|
50
|
...
|
Next
|
