Design & Reuse
Catalog of SIP Cores
System on Chip design resources
arrow Arithmetic & Mathematic (58)
arrow Embedded Memories (996)
arrow I/O Library (1030)
arrow PLL (1747)
arrow Standard cell (756)
4587 IP
251
10.0
Frac-N SSCG PLL - TSMC 6FF
Analog Bits’ low power Fractional-N / SSCG PLL addresses power sensitive designs required for IOT, mobile and other low power applications needing non...
252
10.0
Frac-N SSCG PLL - TSMC N5
Analog Bits’ low power Fractional-N / SSCG PLL addresses power sensitive designs required for IOT, mobile and other low power applications needing non...
253
10.0
FracN/SSCG PLL - TSMC CLN4P
Analog Bits’ low power Fractional-N SSCG PLL addresses power sensitive designs required for IOT, mobile and other low power applications needing non-i...
254
10.0
FracN/SSCG PLL - TSMC CLN5A
Analog Bits’ low power Fractional-N SSCG PLL addresses power sensitive designs required for IOT, mobile and other low power applications needing non-i...
255
10.0
Fractional-N PLL - TSMC 28 CLN28HPC
The programmable Fractional-N divider allows the PLL to lock to an incoming clock source and produce an output clock with a non-integer multiplication...
256
10.0
Fractional-N PLL - TSMC CLN16FFC
The programmable Fractional-N divider allows the PLL to lock to an incoming clock source and produce an output clock with a non-integer multiplication...
257
10.0
SSCG PLL - TSMC CLN3E
Analog Bits’ PCIe REF PLL addresses stringent performance requirements in high-speed serial link applications that support the PCI Express Gen4 and Ge...
258
10.0
SSCG PLL - TSMC CLN3P
Analog Bits’ PCIe REF PLL addresses stringent performance requirements in high-speed serial link applications that support the PCI Express Gen4 and Ge...
259
10.0
TSMC CLN16FFCLL 16nm Clock Generator PLL - 800MHz-4000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
260
10.0
TSMC CLN28HPC 28nm Clock Generator PLL - 175MHz-875MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
261
10.0
TSMC CLN28HPC 28nm Clock Generator PLL - 350MHz-1750MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
262
10.0
TSMC CLN28HPC 28nm Clock Generator PLL - 700MHz-3500MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
263
10.0
TSMC CLN28HPC 28nm Deskew PLL - 175MHz-875MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
264
10.0
TSMC CLN28HPC 28nm Deskew PLL - 350MHz-1750MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
265
10.0
TSMC CLN28HPC 28nm Deskew PLL - 700MHz-3500MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
266
10.0
TSMC CLN28HPC 28nm General Purpose PLL - 350MHz-1750MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...
267
10.0
TSMC CLN28HPC 28nm Spread Spectrum PLL - 150MHz-750MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
268
10.0
TSMC CLN28HPC 28nm Spread Spectrum PLL - 300MHz-1500MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
269
10.0
TSMC CLN28HPC 28nm Spread Spectrum PLL - 600MHz-3000MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
270
10.0
Auto Grade Wide Range Integer PLL - GLOBALFOUNDRIES 22FDX
Analog Bits’ Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to pro...
271
10.0
LVDS I/O Buffer 40/28/22/16/7nm
The LVDS I/O has driver and receiver of TSMC 16, 22, 28, 40nm and Samsung 14nm process. - Support LVDS specification is TIA/EIA-644-A. - LVDS driver...
272
10.0
LVDS IO handling data rate up to 50Mbps with maximum loading 60pF
KA16UGLVDS01ST001 is a LVDS IO handling data rate up to 50Mbps with a maximum loading of 60pF. The differential voltage swing can be programmable from...
273
10.0
1x64 Bits OTP (One-Time Programmable) IP, Globa-Foundr--- 22nmFDX 0.8V/1.8V Process
The AT1X64G22FDX0AA is organized as a 1 by 64 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in Globa-Foundr--- 22nm FD...
274
9.0
40nm 1.1V 16MHz-2GHz Fractional-N Clock-PLL
The TRV301TSM40LP IP is a 1.1V low-power low-silicon-area 16MHz-to-2GHz Fractional-N Clock PLL implemented in TSMC Low-Power 40nm CMOS process technol...
275
9.0
40nm 1.1V 2GHz-4.7GHz Fractional-N RF Quadrature PLL
The TRV302TSM40LP IP is a 1.1V low-power, low-silicon-area and high-performance 2.0GHz-to-4.7GHz Fractional-N RF PLL implemented in TSMC Low-Power 40n...
276
9.0
40nm 1.1V 6.0GHz-9.4GHz Fractional-N RF PLL
The TRV303TSM40LP IP is a 1.1V low-power, low-silicon-area and high-performance 6.0GHz-to-9.4GHz Fractional-N RF PLL implemented in TSMC Low-Power 40n...
277
8.0
Zero Additional Mask MTP
LEE Flash ZT (ZT) achieves automotive grade temperature and quality grade. Perfect fit for trimming and parameter storage in Sensor, Power and Analog...
278
8.0
Next Generation Flash device enabling small size, low power and direct connection with digital circuit which opens up new possibiities
LEE Flash G2 (G2) is an innovative Flash IP offering unique features that no other Flash IP could offer. It is based on LEE Flash G1, which consists ...
279
8.0
IGALVDT08B, TSMC CLN28HPM LVDS TX/RX Combo IO
The IGALVDT08B contain a differential driver (TX) and a re-ceiver (RX) for LVDS interface. It supports the data rate up to 1.5Gbps. There are four mac...
280
8.0
IGALVDV05A, TSMC CLN12FFC 6-Channel LVDS Transmitter PHY
IGALVDV05A is a 6-channel LVDS Transmitter PHY IP, which is used mainly in Flat-panel Display. It enables larger, higher resolution displays and lower...
281
8.0
IGAPLLV01A, TSMC CLN16FF+LL Spread Spectrum Clock Generator PLL
IGAPLLV01A is a Spread Spectrum Phase Lock Loop (SSPLL), without external components and is designed to provide stable and accurate clock. The IGAPL...
282
8.0
IGAPLLV03A, TSMC CLN16FF+ General Purpose PLL
The IGAPLLV03A is a General purpose Phase Lock Loop (PLL), without external components and is designed to provide stable and accurate clock. The IGAPL...
283
8.0
IGAPLLV08A, TSMC CLN16FFC/CLN12FFC General Propose PLL
IGAPLLV08A is a general purpose de-skew phase locked loop (PLL) without external component. IGAPLLV08A incorporates several frequency dividers to gene...
284
8.0
IGAPLLV09A, TSMC CLN12FFC/CLN16FFC General purpose PLL
IGAPLLV09 PLL-based clock generating IP integrates a voltage-controlled oscillator, a phase frequency detector, a charge pump, a loop filter, and thre...
285
8.0
IGAPLLV10A, TSMC CLN12FFC Spread Spectrum Clock Generate Phase Lock Loop
IGAPLLV10A is a Spread Spectrum Phase Lock Loop (SSPLL), without external components and is designed to provide stable and accurate clock. The SSPLL i...
286
8.0
IGMDLSX01A, TSMC CLN7FF High Speed Dual Port SRAM
IGMDLSX01A, TSMC CLN7FF High Speed Dual Port SRAM...
287
8.0
IGMSLSX01A, TSMC CLN7FF Low Power High Speed Single Port SRAM
IGMSLSX01A, TSMC CLN7FF Low Power High Speed Single Port SRAM...
288
8.0
Embedded flash IP, 1.32V/3V PSMC 90nm
LEE Flash G1 (G1) is based on simple SONOS architecture and capable to scale down to 40nm and supports auto grade temperature and quality. G1 is cos...
289
8.0
Embedded flash IP, 1.5V/5V 130BCD Plus
LEE Flash G1 (G1) is based on simple SONOS architecture and capable to scale down to 40nm . G1 is best fit embedded flash IP to BCD nodes and it can...
290
8.0
Embedded flash IP, 1.5V/5V 130nm
LEE Flash G1 (G1) is based on simple SONOS architecture and capable to scale down to 40nm and supports auto grade temperature and quality. G1 is cos...
291
8.0
Low jitter, low-power clock-deskew PLL operating from 6GHz to 9.5GHz
InCirT’s CDPLLGF22 is a ring-oscillator-based clock-deskew PLL designed for low jitter and low power consumption, operating within a frequency range o...
292
8.0
Low jitter, ultra-low power (<950uW) ring-oscillator-based PLL-2.4GHz
InCirT’s APLL2p4GGF22 is the ring-oscillator based analogue-PLL which provides low jitter (1ps rms jitter at 2.4GHz) and low-power consumption (<950uW...
293
8.0
TSMC CLN12FFC Ternary Content Addressable Memory Compiler
IGMTLSV04A is a synchronous LVT / ULVT periphery high-density ternary content addressable memory (TCAM). It is developed with TSMC 12nm 0.8V/1.8V CMOS...
294
8.0
TSMC CLN16FFC Ternary Content Addressable Memory
IGMTLSLV02A is a synchronous LVT periphery high-density ternary content addressable memory (TCAM). It is developed with TSMC 16 nm 0.8 V/1.8 V CMOS LO...
295
8.0
TSMC CLN5FF Ternary Content Addressable Memory Compiler with Column Redundancy
IGMTLSY01A is a synchronous LVTLL / LVT / ULVT periphery high-density ternary content addressable memory (TCAM) with column redundancy feature. It is ...
296
8.0
TSMC CLN5FFP Pre-search and Pipeline Ternary Content Addressable Memory
IGMTLSY02A, TSMC CLN5FFP Pre-search and Pipeline Ternary Content Addressable Memory...
297
8.0
TSMC CLN6FF Asynchronous Read Two Port Register File Compiler
IGMDLRX01A is an asynchronous read and synchronous write ULVT periphery two port register file compiler (2PRF). It is developed with TSMC 6nm 0.75V/1....
298
8.0
TSMC CLN7FF Pre-search and Pipeline Ternary Content Addressable Memory Compiler
IGMTLSX04A is a synchronous LVT / ULVT periphery high-density pre-search and pipeline ternary content addressable memory (TCAM) with column redundancy...
299
7.5
Clock Management IP (Exclusively for Turnkey ASIC design; not for standalone licensing)
This is a Clock Management IP that can drive 3 different output clocks. These 3 different clocks are required for any simple Digital or Mixed Signal A...
300
6.0
10-bit dual-port 30MHz ~ 85MHz LVDS Tx;
...