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2743 IP
251
3.0
Metal programmable ROM compiler - Memory optimized for low power and high density - Dual Voltage - compiler range up to 1024 k
Metal programmable ROM compiler - TSMC 180 nm eLL - Non volatile memory optimized for low power and high density - Dual Voltage - compiler range up to...
252
3.0
Single Port Register File compiler - Memory optimized for high density and high speed - compiler range up to 40 k
Single Port Register File compiler - TSMC 55 nm LP - Memory optimized for high density and high speed - compiler range up to 40 k...
253
3.0
Single Port Register File compiler - Memory optimized for high density and high speed - compiler range up to 40 k
Single Port Register File compiler - TSMC 65 nm LP - Memory optimized for high density and high speed - compiler range up to 40 k...
254
3.0
Single Port Register File compiler - Memory optimized for high density and high speed - compiler range up to 40 k
Foundry sponsored - Single Port Register File compiler - TSMC 90 nm LPeF - Memory optimized for high density and high speed - compiler range up to 40 ...
255
3.0
Single Port Register File compiler - Memory optimized for high density and speed - Dual Voltage - compiler range up to 40 k
Foundry sponsored - Single Port Register File compiler - TSMC 90 nm uLL - high density - Dual Voltage - compiler range up to 40 k...
256
3.0
Single Port Register File compiler - Memory optimized for high density and speed - Dual Voltage - Compiler range up to 40 kbits
Single Port Register File compiler - TSMC 90 nm uLL - Memory optimized for high density and speed - Dual Voltage - Compiler range up to 40 kbits...
257
3.0
Single Port Register File compiler - Memory optimized for ultra high density and high speed - compiler range up to 20 k
Foundry Sponsored - Single Port Register File compiler - TSMC 110 nm HV_1.5V_5V - Memory optimized for ultra high density and high speed - compiler ra...
258
3.0
Single Port Register File compiler - Memory optimized for ultra high density and high speed - compiler range up to 20 k
Single Port Register File compiler - TSMC 110 nm HV_1.5V_5V_32V - Memory optimized for ultra high density and high speed - compiler range up to 20 k...
259
3.0
Single Port SRAM compiler - Memory optimized for high density and low power - compiler range up to 320 k
Single Port SRAM compiler - TSMC 55 nm LPeF - Memory optimized for high density and Low power - compiler range up to 320 k...
260
3.0
Single Port SRAM compiler - Memory optimized for high density and low power - compiler range up to 320 k
Single Port SRAM compiler - TSMC 110 nm HV_1.5V_5V_32V - Memory optimized for high density and low power - compiler range up to 320 k...
261
3.0
Single Port SRAM compiler - Memory optimized for high density and speed - Dual Voltage - Compiler range up to 640 kbits
Single Port SRAM compiler - TSMC 90 nm uLL - Memory optimized for high density and speed - Dual Voltage - Compiler range up to 640 kbits...
262
3.0
Single Port SRAM compiler - Memory optimized for ultra high density and low power - 3ML- compiler range up to 320 k
Foundry sponsored - Single Port SRAM compiler - TSMC 55 nm HV - Memory optimized for ultra high density and low power - 3ML- compiler range up to 320 ...
263
3.0
Single Port SRAM compiler - Memory optimized for ultra low power and high density - Dual Voltage - compiler range up to 512 k
Single Port SRAM compiler - TSMC 180 nm uLL - Memory optimized for ultra low power and high density - Dual Voltage - compiler range up to 512 k...
264
3.0
CLICK - The universal solution of power gating for the whole SoC
CLICK is a fully automated island kit generator applicable to any hard macro or logic digital block, allowing implementation of power management techn...
265
3.0
CLICK - The universal solution of power gating for the whole SoC
CLICK is a fully automated island kit generator applicable to any hard macro or logic digital block, allowing implementation of power management techn...
266
3.0
CLICK - The universal solution of power gating for the whole SoC
TSMC 40 uLP, CLICK, power gating cells to create a ring of switches in order to ease the integration of hard macro and provide automatic control of in...
267
3.0
CLICK - The universal solution of power gating for the whole SoC
TSMC 40 uLPeF, CLICK, power gating cells to create a ring of switches in order to ease the integration of hard macro and provide automatic control of ...
268
3.0
Color Camera Sensor Bayer Decoder
Today most common single-chip cameras use CMOS sensors with pixels arranged in Bayer color pattern. Bayer filter in front of the sensor embeds color i...
269
3.0
Voltage Domain Interfacing Cells for use between power domains using core transistors.
LS-CDM are Level Shifter with CDM protection are Domain Interfacing Cells. Provided as High-Low and Low-High level shifters including isolation and CD...
270
3.0
Voltage Domain Interfacing Cells for use between power domains using core transistors.
Level Shifter with CDM protection are Domain Interfacing Cells. Provided as High-Low and Low-High level shifters including isolation and CDM protectio...
271
3.0
Voltage Domain Interfacing Cells for use between power domains using core transistors.
Level shifters are add-ons to Dolphin standard cell library solutions and voltage regulator solutions. LS-CDM are High-Low and Low-High Level Shifter...
272
3.0
sROMet compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 1M
Foundry sponsored - sROMet compiler - TSMC 55 nm uLP - Non volatile memory optimized for high density and low power - Dual Voltage - compiler range up...
273
3.0
sROMet compiler - TSMC 40 nm uLPeFlash - Non volatile memory optimized for high density and low power - Dual Voltage - compiler range up to 1M
sROMet compiler - TSMC 40 nm uLPeFlash - Non volatile memory optimized for high density and low power - Dual Voltage - compiler range up to 1M...
274
3.0
TSMC RF ESD specifiically targeting low capacitance ESD
RF ESD specifically targetting low capacitance ESD protection strategies. It is not a full IO Library, but a collection of standalone ESD cells. ESD t...
275
3.0
Dual Port SRAM compiler - Memory optimized for high density and low power - compiler range up to 80 k
Foundry sponsored - Dual Port SRAM compiler - TSMC 90 nm LPeF - Memory optimized for high density and low power - compiler range up to 80 k...
276
3.0
Dual Port SRAM compiler - Memory optimized for high density and low power - Dual Rail - compiler range up to 288 k
Dual Port SRAM compiler - TSMC 40 nm uLP - Memory optimized for high density and low power - Dual Rail - compiler range up to 288 k...
277
3.0
Dual Port SRAM compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 64 k
Foundry sponsored - Dual Port SRAM compiler - TSMC 55 nm uLP - Memory optimized for high density and low power - Dual Voltage - compiler range up to 2...
278
3.0
Dual Port SRAM compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 64 k
Foundry sponsored - Dual Port SRAM compiler - TSMC 55 nm uLPeFlash - Memory optimized for high density and low power - Dual Voltage - compiler range u...
279
3.0
Dual Port SRAM compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 72 k
Dual Port SRAM compiler - TSMC 55 nm uLPeFlash - Memory optimized for high density and low power - Dual Voltage - compiler range up to 72 k...
280
3.0
5V Library for Generic I/O and ESD Applications TSMC 12nm FFC/FFC+ process.
This library is a base set of ESD protection structures for I/O and Power supplies. The design targets up to 8A applications (>8kV HBM).The I/Os are d...
281
3.0
Two Port Register File compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 64 k
Foundry sponsored - Two Port Register File compiler - TSMC 55 nm uLPeFlash - Memory optimized for high density and low power - Dual Voltage - compiler...
282
3.0
Two Port Register File compiler - Memory optimized for high density and low power optimized - compiler range up to 40 k
Foundry sponsored - Two Port Register File compiler - TSMC 90 nm LPeF - Memory optimized for high density and low power optimized - compiler range up ...
283
3.0
Two Port Register File compiler - Memory optimized fore high density and high speed - compiler range up to 320 k
Foundry sponsored - Two Port Register File compiler - TSMC 55 nm HV - Memory optimized fore high density and high speed - compiler range up to 320 k...
284
3.0
Two Port Register File compiler - Memory optimized fore high density and high speed - compiler range up to 320 k
Foundry sponsored - Two Port Register File compiler - TSMC 55 nm HV - Memory optimized fore high density and high speed - compiler range up to 320 k...
285
2.0
A 65nm Wirebond IO library with 2.5V GPIO, LVDS TX & RX and 2.5V analog / RF
Key attributes of the GlobalFoundries 65nm IO library are dual selectable drive strengths and independent input & output enable / disable. The GPIO ce...
286
2.0
A radiation-hardened GlobalFoundries 12nm LP/LP+ 0.8V LVDS Transceiver
Certus Semiconductor’s 2.5Gbps LVDS transceiver in GlobalFoundries LP/LP+ is designed for high-speed, low-power data transmission in radiation-intensi...
287
2.0
7 way DDR combo
The LPDDR2/3_DDR3/4 libraries contain the 7-way combo driver/receiver cells with embedded power cells, the driver impedance calibration cell, and the ...
288
2.0
7 way DDR combo
The LPDDR2/3_DDR3/4 libraries contain the 7-way combo driver/receiver cells with embedded power cells, the driver impedance calibration cell, and the ...
289
2.0
4-Quadrant Arctan Function
Function φ = atan2(y,x) calculates the 4-quadrant inverse tangent in the range -Pi to Pi. Functionally equivalent to the atan2 function in 'C' an...
290
2.0
1.2V GPIO
The 1.2V GPIO library provides a bidirectional I/O driver for Parallel Trace Interface applications. This cell is compliant with version 2.0 of the th...
291
2.0
1.2V GPIO library designed for the SVID three-line interface.
The 1.2V GPIO library provides an open-drain bi-directional I/O driver designed for the SVID three-line interface. It is compliant with the Intel SVID...
292
2.0
3.3V Fault Tolerant General Purpose I/O Inline Pad Set
The 3.3V GPIO FT library provides general purpose bidirectional I/O cells that are fault tolerant. These programmable, multi-voltage I/O’s give the sy...
293
2.0
3.3V Fault Tolerant General Purpose I/O Staggered Pad Set
The 3.3V GPIO FT library provides general purpose bidirectional I/O cells that are fault tolerant. These programmable, multi-voltage I/O’s give the sy...
294
2.0
3.3V General Purpose I/O Inline Pad Set
The 3.3V GPIO library provides general purpose bidirectional I/O cells. These programmable, multi-voltage I/O’s give the system designer the flexibili...
295
2.0
3.3V General Purpose I/O Staggered Pad Set
The 3.3V GPIO library provides general purpose bidirectional I/O cells. These programmable, multi-voltage I/O’s give the system designer the flexibili...
296
2.0
3.3V 100 MHz Oscillator I/O Pad Set
The 1.8V General Purpose I/O library provides bidirectional I/O, isolated analog I/O, and a full complement of power cells along with corner and spa...
297
2.0
3.3V 100MHz Oscillator I/O Pad Set
The 3.3V 100MHz Oscillators library includes a programmable oscillator macro I/O cell. ▪ 100 MHz programmable oscillator These libraries are off...
298
2.0
3.3V 32 KHz RTC and Programmable 100MHz Oscillator I/O Pad Set
The Oscillator library provides oscillators for on-chip asynchronous clock generation with an appropriate external crystal. This library is provided...
299
2.0
3.3V 32 KHz RTC and Programmable 100MHz Oscillator I/O Pad Set
The Oscillators library provides oscillators for on-chip asynchronous clock generation with an appropriate external crystal. This library is offered a...
300
2.0
3.3V 32kHz RTC, 50MHz Low Power Oscillator, and Programmable 100MHz Oscillator Pad Set
The Oscillators library provides oscillators for on-chip asynchronous clock generation with an appropriate external crystal. This library is offered a...