Design & Reuse
Catalog of SIP Cores
System on Chip design resources
2827 IP
2601
0.0
768x39 Bits OTP (One-Time Programmable) IP, TSM- 55ULP 0.9V–1.2V / 2.5V Process
The ATO0768X39TS055ULP4NL is organized as 768x39 one-time programmable (OTP). This is a type of non-volatile memory fabricated in TSM- 55nm LP 1.2V/2....
2602
0.0
36Kbyte EEPROM IP with configuration 288p32w32bit
The block is a nonvolatile electrically erasable programmable read-only memory (EEPROM) with volume 36Kbyte (32(bit per word) x 32(words per page) x 2...
2603
0.0
36Kbyte EEPROM IP with configuration 288p32w32bit and oscillator
130GF_EEPROM_07 is a nonvolatile electrically erasable programmable read-only memory with volume 36Kbyte (32(bit per word) x 32(words per page) x 288(...
2604
0.0
16x16 Bits OTP (One-Time Programmable) IP, SMI- 0.18μm BCDM 1.8V/5V process
The ATO0016X16SM180BS33NA is organized as 16 bits by 16 one-time programmable (OTP) in 16-bit read and 1-bit program modes. This is a kind of non-vola...
2605
0.0
16x8 Bits OTP (One-Time Programmable) IP, TSM- CM018G 0.18μm 1.8V/3.3V Process
The ATO00016X8TS180CMG3NA is organized as 16 bits by 8 one-time programmable (OTP) in 8-bit read and 1-bit program modes. This is a kind of non-volati...
2606
0.0
16x8 Bits OTP (One-Time Programmable) IP, VI- 150nm 1.8V BCD Process
The ATO00016X8VI150BG22NA is organized as 16 bits by 8 one-time programmable in 8-bit read and 1-bit program modes. This is a kind of non-volatile m...
2607
0.0
16x8 Bits OTP (One-Time Programmable) IP, X-FA- 0.18um XH018 1.8V/3.3V process
The ATO00016X8XH18018P4DA is organized as a 16-bit by 8 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in 0.18µm XH018...
2608
0.0
UA11: 200Mbps 1.2V SLVS transceiver, UMC 110nm
A compact 1.2V SLVS transceiver in UMC 110nm for high-speed, low-power links. It provides JESD8-13-compliant TX and RX paths up to 200Mbps with strong...
2609
0.0
TA22: 200Mbps 0.9V SLVS Transceiver, TSMC 22nm
A 0.9V SLVS differential transceiver in TSMC 22nm, optimized for low-power, high-speed signaling. It supports data rates up to 200Mbps, complies with ...
2610
0.0
PAD - HHGrace 110nm ULL
...
2611
0.0
Radiation-Hardened GPIO, ODIO and LVDS Interface in SkyWater 90nm
This Library, developed on SkyWater 90nm CMOS, delivers a radiation-hardened suite of robust interfaces covering general-purpose, open-drain, and high...
2612
0.0
Rail to rail LVDS receiver 1 Gbps
LVDS_RX is LVDS receiver with rail to rail input range. The interface to the core logic includes the output signal pin (OUTp) to receive data and the ...
2613
0.0
Half Precision IEEE-754R complete FPU for graphics processing
This block may be used to convert and existing single register stage into a stallable pipeline stage. It can also be used with synchronous RAM blocks...
2614
0.0
TCAM Compilers for Samsung (14nm, 10nm, SF5A, SF4X)
Synopsys embedded ternary content addressable memories (TCAMs) help networking designers meet the demand for wire-speed packet processing, access cont...
2615
0.0
TCAM Compilers for SMIC (28nm)
Synopsys embedded ternary content addressable memories (TCAMs) help networking designers meet the demand for wire-speed packet processing, access cont...
2616
0.0
TCAM Compilers for TSMC (65nm, 40nm, 28nm, 16nm, N7, N6, N5, N4
Synopsys embedded ternary content addressable memories (TCAMs) help networking designers meet the demand for wire-speed packet processing, access cont...
2617
0.0
TCAM in SMIC 28HK+ upto 800Mbps
...
2618
0.0
SD 3.0 I/O Pad Set
The SD library provides the driver / receiver cell and required support cells for SD 3.0 signaling. Fault-tolerant operation. This library is offere...
2619
0.0
3DIO PHY IP for TSMC N5
Synopsys 3DIO is a specialized IO for multi-die integration. It includes multiple IP offerings for system-on-chip (SoC) designers to implement tunable...
2620
0.0
DDR combo IO in SMIC 28HKC+, supporting DDR3,4/LPDDR3,4, upto 2667Mbps
Brite DDR (Double Data Rate SDRAM) IO libraries cover wide range of DDR standards, from DDR2 to DDR4 and LPDDR2 to LPDDR4X with the data rate from 200...
2621
0.0
DDR combo IO in SMIC 28HKD 0.9/1.8V, supporting DDR3,4/LPDDR3,4, upto 2667Mbps
Brite DDR (Double Data Rate SDRAM) IO libraries cover wide range of DDR standards, from DDR2 to DDR4 and LPDDR2 to LPDDR4X with the data rate from 200...
2622
0.0
DDR combo IO in SMIC 28HKD 0.9/2.5V, supporting DDR2,3/LPDDR2,3, upto 1600Mbps for IOT application
Brite DDR (Double Data Rate SDRAM) IO libraries cover wide range of DDR standards, from DDR2 to DDR4 and LPDDR2 to LPDDR4X with the data rate from 200...
2623
0.0
DDR combo IO in SMIC 28HKD 0.9/2.5V, supporting DDR3,4/LPDDR3,4, upto 1866Mbps
Brite DDR (Double Data Rate SDRAM) IO libraries cover wide range of DDR standards, from DDR2 to DDR4 and LPDDR2 to LPDDR4X with the data rate from 200...
2624
0.0
DDR combo IO in SMIC 40NLL, supporting DDR2,3/LPDDR2,3, upto 1333Mbps
Brite DDR (Double Data Rate SDRAM) IO libraries cover wide range of DDR standards, from DDR2 to DDR4 and LPDDR2 to LPDDR4X with the data rate from 200...
2625
0.0
DDR combo IO in SMIC 40NLL, supporting DDR3,3U,3L,4/LPDDR2,3, upto 1866Mbps
Brite DDR (Double Data Rate SDRAM) IO libraries cover wide range of DDR standards, from DDR2 to DDR4 and LPDDR2 to LPDDR4X with the data rate from 200...
2626
0.0
DDR combo IO in SMIC 55NLL, supporting DDR2/3/3L /LPDDR2/3, upto 1333Mbps
Brite DDR IO libraries cover wide range of DDR standards, from DDR2 to DDR4 and LPDDR2 to LPDDR4X with the data rate from 200Mbps to 4805Mbps. Brite p...
2627
0.0
Secure Storage Solution for OTP IP
Synopsys Secure Storage Solution for OTP is an add-on solution to Synopsys One-Time-Programable (OTP) Non-Volatile Memory (NVM) IP, designed to addres...
2628
0.0
IEEE 754 Floating Point Coprocessor
The A2F3 is a fully synthesizable module implemented in Verilog RTL. It is a co-processor unit providing floating-point computation compliant with th...
2629
0.0
Register File with low power retention mode and 3 speed options
Low Leakage. Mobile Semiconductor's RF1P-ULL-GF22FDX-PLUS memory compiler generates single-port Register File instances using the GLOBALFOUNDRIES 22nm...
2630
0.0
Register File with low power retention mode and 3 speed options
Low Leakage. Mobile Semiconductor's SP-ULD-GF22FDX-PLUS memory compiler generates single-port Register File instances using the GLOBALFOUNDRIES 22nm F...
2631
0.0
Register File with low power retention mode, high speed pins on 1 side
Low Leakage. Mobile Semiconductor's Bulk 22 ULL Register file memory compiler generates single-port Register File instances using the Bulk 22ULL proce...
2632
0.0
Register, Configuration and Control Bus
A2R provides an interconnection mechanism between control registers in an ASIC design and any number of control devices; CPUs, debug ports etc.. The b...
2633
0.0
memBrain™ Tile
...
2634
0.0
ReRAM (RRAM) NVM in DB HiTek 130nm BCD (128Kb)
Weebit ReRAM (Resistive Random Access Memory) is an innovative Non-Volatile Memory (NVM) technology that can be easily integrated into any CMOS IC. ...
2635
0.0
ReRAM (RRAM) NVM in DB HiTek 130nm BCD (1Mb)
Weebit ReRAM (Resistive Random Access Memory) is an innovative Non-Volatile Memory (NVM) technology that can be easily integrated into any CMOS IC. ...
2636
0.0
ReRAM (RRAM) NVM in DB HiTek 130nm BCD (256Kb)
Weebit ReRAM (Resistive Random Access Memory) is an innovative Non-Volatile Memory (NVM) technology that can be easily integrated into any CMOS IC. ...
2637
0.0
ReRAM (RRAM) NVM in DB HiTek 130nm BCD (512Kb)
Weebit ReRAM (Resistive Random Access Memory) is an innovative Non-Volatile Memory (NVM) technology that can be easily integrated into any CMOS IC. ...
2638
0.0
ReRAM (RRAM) NVM in DB HiTek 130nm BCD (64Kb)
Weebit ReRAM (Resistive Random Access Memory) is an innovative Non-Volatile Memory (NVM) technology that can be easily integrated into any CMOS IC. ...
2639
0.0
Zero fall-through synchronous FIFO
Fully synchronous FIFO with zero fall-through such that when empty the FIFO behaves like a single stage register....
2640
0.0
Metal programmable ROM compiler - Memory optimized for low power - compiler range up to 1024 k
Foundry Sponsored - Metal programmable ROM compiler - TSMC 90 nm LPeF - Non volatile memory optimized for low power - compiler range up to 1024 k...
2641
0.0
Metal programmable ROM compiler - Memory optimized for low power - compiler range up to 256 k
Metal programmable ROM compiler - TSMC 65 nm LP - Non volatile memory optimized for low power - compiler range up to 256 k...
2642
0.0
Metal programmable ROM compiler - Memory optimized for low power - compiler range up to 256 k
Foundry Sponsored - Metal programmable ROM compiler - TSMC 130 nm BCD - Non volatile memory optimized for low power - compiler range up to 256 k...
2643
0.0
Metal programmable ROM compiler - Memory optimized for low power - Dual Voltage - compiler range up to 1024 k
Metal programmable ROM compiler - TSMC 130 nm G - Non volatile memory optimized for low power - Dual Voltage - compiler range up to 1024 k...
2644
0.0
Metal programmable ROM compiler - Non volitile memory optimized for low power - compiler range up to 256 k
Metal programmable ROM compiler - TSMC 130 nm BCD Plus - Non volatile memory optimized for low power - compiler range up to 256 k...
2645
0.0
IGALVDT11A, TSMC CLN28HPC+/HPC/HPM LVDS RX PHY [8ch]
The IGALVDT11A is a TSMC CLN28HPC+/HPC/HPM 8-channel LVDS receiver PHY, which is used mainly in baseband IC and RFIC communication. An internal deskew...
2646
0.0
IGALVDT13A, TSMC 28nm HPC+ LVDS TX+RX I/O
IGALVDT13A, TSMC 28nm HPC+ LVDS TX+RX I/O...
2647
0.0
IGALVDT14A, TSMC CLN28HPC+ LVDS RX and CMOS Combo I/O
IGALVDT14A contains a receiver (RX) for LVDS interface and bi-derectional double CMOS. It supports the data rate up to 500Mbps. There is one macro ins...
2648
0.0
RGMII IO Pad Set
The (R)GMII library provides the combo driver / receiver and required support cells for (R)GMII signaling. The libraries are compliant with the Gigabi...
2649
0.0
MH12: Hardened 1.8V/3.3V GPIO & power library with integrated POC, TSMC 12nm
A production-ready flip-chip I/O library in TSMC 12nm (FFC/FFC+) built around hardened 1.8V/3.3V GPIOs with programmable drive strength, input hystere...
2650
0.0
The SST SuperFlash® IP is an embedded CMOS Flash memory IP with sector/chip Erase and byte Program capability.
SuperFlash® is SST’s patented and proprietary NOR flash technology. With 80B+ devices shipped, SuperFlash is the non-volatile memory of choice for emb...