Design & Reuse
Catalog of SIP Cores
System on Chip design resources
2827 IP
2701
0.0
4Kx9 Bits OTP (One-Time Programmable) IP, Globa-Foundr--- 12LP+ 0.8V/1.8V Process
The ATO0004KX9GF012LPP8ZA is organized as 4K-bits by 9 one-time programmable (OTP). This is a type of non-volatile memory fabricated in Globa-Foundr--...
2702
0.0
Floating point adder
Floating point adder...
2703
0.0
Floating point MAC
Floating point MAC...
2704
0.0
Floating point multiplier
Floating point multiplier...
2705
0.0
Ultra High Density, 5-track, 3nm channel length, 48nm poly pitch TSMC 2nm Plus
Ultra High Density, 5-track, 3nm channel length, 48nm poly pitch TSMC 2nm Plus...
2706
0.0
Ultra High Density, 6-track, 3nm channel length, 48nm poly pitch TSMC 2nm Plus
Ultra High Density, 6-track, 3nm channel length, 48nm poly pitch TSMC 2nm Plus...
2707
0.0
ONFI IO Pad Set
The ONFI library provides the combo driver / receiver cells, the ODT / driver impedance calibration cell, and the voltage reference cell to support bo...
2708
0.0
ONFI4.0 NAND Flash IO in SMIC 40NLL, upto 800Mbps
Brite ONFI IO is applied for NAND flash memory interface. Brite ONFI IO libraries are compliant to ONFI 5.0/4.2/4.0/3.2 standards with ODT (On-Die Ter...
2709
0.0
LogicEE® Embedded EEPROM in CSMC 180nm~110nm
LogicEE® EEPROM IP是替代外部EEPROM的IP解决方案,可在逻辑工艺上实现,而无需增加额外的光罩层次。最大支持2K字节(Byte)存储容量,并可实现位操作,同时提供高达10万次的写入及擦除次数。...
2710
0.0
LogicEE® Embedded EEPROM in SMIC 180nm~55nm
LogicEE® EEPROM IP是替代外部EEPROM的IP解决方案,可在逻辑工艺上实现,而无需增加额外的光罩层次。最大支持2K字节(Byte)存储容量,并可实现位操作,同时提供高达10万次的写入及擦除次数。...
2711
0.0
LogicFlash Pro® Embedded Flash memory IP
LogicFlash Pro® eFlash是拥有自主知识产权的嵌入式闪存技术,可实现高性能、高可靠性的大容量存储。 产品开发验证中。...
2712
0.0
LogicFlash® Embedded MTP in CSMC 180nm~110nm
LogicFlash® MTP是一种基于CMOS工艺的嵌入式非挥发性存储器技术,基于逻辑工艺实现,无需增加额外光罩层次,或通过增加1层额外光罩,缩减IP面积,适合于1KB~64KB的中等容量应用,同时提供高达2万次的擦写次数。 LogicFlash®技术可以在0.18um到55nm的Logic/BC...
2713
0.0
LogicFlash® Embedded MTP in GlobalFoundries 180nm~110nm
LogicFlash® MTP是一种基于CMOS工艺的嵌入式非挥发性存储器技术,基于逻辑工艺实现,无需增加额外光罩层次,或通过增加1层额外光罩,缩减IP面积,适合于1KB~64KB的中等容量应用,同时提供高达2万次的擦写次数。 LogicFlash®技术可以在0.18um到55nm的Logic/BC...
2714
0.0
LogicFlash® Embedded MTP in HHGrace 180nm~55nm
LogicFlash® MTP是一种基于CMOS工艺的嵌入式非挥发性存储器技术,基于逻辑工艺实现,无需增加额外光罩层次,或通过增加1层额外光罩,缩减IP面积,适合于1KB~64KB的中等容量应用,同时提供高达2万次的擦写次数。 LogicFlash®技术可以在0.18um到55nm的Logic/BC...
2715
0.0
LogicFlash® Embedded MTP in Nexchip 150nm~55nm
LogicFlash® MTP是一种基于CMOS工艺的嵌入式非挥发性存储器技术,基于逻辑工艺实现,无需增加额外光罩层次,或通过增加1层额外光罩,缩减IP面积,适合于1KB~64KB的中等容量应用,同时提供高达2万次的擦写次数。 LogicFlash®技术可以在0.18um到55nm的Logic/BC...
2716
0.0
LogicFlash® Embedded MTP in Silterra 180nm~110nm
LogicFlash® MTP是一种基于CMOS工艺的嵌入式非挥发性存储器技术,基于逻辑工艺实现,无需增加额外光罩层次,或通过增加1层额外光罩,缩减IP面积,适合于1KB~64KB的中等容量应用,同时提供高达2万次的擦写次数。 LogicFlash®技术可以在0.18um到55nm的Logic/BC...
2717
0.0
LogicFlash® Embedded MTP in SMIC 180nm~55nm
LogicFlash® MTP是一种基于CMOS工艺的嵌入式非挥发性存储器技术,基于逻辑工艺实现,无需增加额外光罩层次,或通过增加1层额外光罩,缩减IP面积,适合于1KB~64KB的中等容量应用,同时提供高达2万次的擦写次数。 LogicFlash®技术可以在0.18um到55nm的Logic/BC...
2718
0.0
LogicFlash® Embedded MTP in Tower 180nm
LogicFlash® MTP是一种基于CMOS工艺的嵌入式非挥发性存储器技术,基于逻辑工艺实现,无需增加额外光罩层次,或通过增加1层额外光罩,缩减IP面积,适合于1KB~64KB的中等容量应用,同时提供高达2万次的擦写次数。 LogicFlash®技术可以在0.18um到55nm的Logic/BC...
2719
0.0
LogicFlash® Embedded MTP in TSMC 180nm~130nm
LogicFlash® MTP是一种基于CMOS工艺的嵌入式非挥发性存储器技术,基于逻辑工艺实现,无需增加额外光罩层次,或通过增加1层额外光罩,缩减IP面积,适合于1KB~64KB的中等容量应用,同时提供高达2万次的擦写次数。 LogicFlash®技术可以在0.18um到55nm的Logic/BC...
2720
0.0
LogicFlash® Embedded MTP in UMC 180nm~110nm
LogicFlash® MTP是一种基于CMOS工艺的嵌入式非挥发性存储器技术,基于逻辑工艺实现,无需增加额外光罩层次,或通过增加1层额外光罩,缩减IP面积,适合于1KB~64KB的中等容量应用,同时提供高达2万次的擦写次数。 LogicFlash®技术可以在0.18um到55nm的Logic/BC...
2721
0.0
Color Camera Sensor Bayer Decoder
Today most common single-chip cameras use CMOS sensors with pixels arranged in Bayer color pattern. Bayer filter in front of the sensor embeds color i...
2722
0.0
DolphinWare Arithmetic Components Ips
Dolphin Technology provides DolphinWare Arithmetic Components IPs, consist of Math Operators and Converters....
2723
0.0
DolphinWare Control Logic Ips
Dolphin Technology provides DolphinWare Control Logic IPs, consist of Arbiter and FIFO....
2724
0.0
DolphinWare Data Integrity Ips
Dolphin Technology provides DolphinWare Data Integrity IPs, consist of Encoders, Decoders and Error Correction....
2725
0.0
DolphinWare Logic Components Ips
Dolphin Technology provides DolphinWare Logic Components IPs, consist of Counters, Registers and MUXs....
2726
0.0
DolphinWare Verification Ips
Dolphin Technology provides DolphinWare Verification IPs (VIPs), consist of AXI4, APB, SD4.0/UHS-II, I2C, I3C, I2S....
2727
0.0
Foundry sponsored - Single Port SRAM compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 320 k
Foundry sponsored - Single port SRAM compiler - TSMC 55 nm uLP - Memory optimized for high density and low power - Dual Voltage - compiler range up to...
2728
0.0
Four Channel (4CH) LVDS Receiver in TSMC 40LP
The MXL-LVDS-4CH-RX-T-40LP is a high-performance 4-channel LVDS Receiver implemented using digital CMOS technology. Both the serial and parallel data ...
2729
0.0
Four Channel (4CH) LVDS Serializer in Samsung 28FDSOI
The 28FDSOI-LVDS-4CH-TX-1250-PLL is a high performance 4-channel LVDS Serializer implemented using digital CMOS technology. Both the serial and parall...
2730
0.0
Four Channel (4CH) LVDS Transmitter (Serializer) in TSMC 40LP
The MXL-LVDS-4CH-TX-T-40LP is a high-performance 4-channel LVDS transmitter implemented using digital CMOS technology. With a maximum transmit clock f...
2731
0.0
Four Channel LVDS Serializer in TSMC 130nm
The MXL-SR-LVDS-4CH7-130 is a high performance 4-channel LVDS Serializer implemented using digital CMOS technology. Both the serial and parallel data ...
2732
0.0
Low Power MCU I/O
This I/O library can easily support digital core voltage power off, and voltage transformation between different voltage domains. The common GPIOs con...
2733
0.0
Up to 1.25 Gbps DDR LVDS IPs library
130TSMC_LVDS_04 is a library including: • Transmitter LVDS driver (LVDS_TX); • Receiver LVDS driver (LVDS_RX); • Bandgap reference block (LVDS_BG)...
2734
0.0
Up to 400 Mbps DDR LVDS receiver
130GF_LVDS_01 is a LVDS receiver with data rate up to 400 Mbps (DDR mode). The LVDS receiver converts input LVDS signal to differential CMOS 1.5V stan...
2735
0.0
Specialty SSTL IO IP, UMC 0.18um G2 process
UMC 0.18um GII Logic process true 2.5V SSTL2 IO cells....
2736
0.0
GPIO IP
GPIO provides general purpose input output interface with AXI, AHB, Avalon and APB, compatible with standard protocol of GPIO specifications. Through ...
2737
0.0
IPT OPTIMIZED STD CELL
InPsytech comprehensive foundation IP portfolio offers a complete standard cell (STD) solution suitable for a broad range of system-on-chip (SoC) desi...
2738
0.0
sROMet compiler - Memory optimized for high density and high speed - compiler range up to 2M
Foundry sponsored - sROMet compiler - TSMC 55 nm HV - Non volatile memory optimized for high density and high speed - compiler range up to 2M...
2739
0.0
sROMet compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 1M
Foundry sponsored - sROMet compiler - TSMC 55 nm uLPeFlash - Non volatile memory optimized for high density and low power - Dual Voltage - compiler ra...
2740
0.0
True Random Number Generator IP Block
Crypto Quantique’s hardware primitives that supplement the Root of Trust include the Physical Unclonable Function (PUF) & True Random Number Generator...
2741
0.0
Pseudo 2 Port High-Current Compiler with Column Redundancy, Low Leakage with retention, Power Gating w/wo retention, Dual Rail, Mixed VT option
Pseudo 2 Port High-Current Compiler with Column Redundancy, Low Leakage with retention, Power Gating w/wo retention, Dual Rail, Mixed VT option...
2742
0.0
TSMC 40G 2Gb/s bidirectional LVDS IO cell
The LSB25R/Z cell is a high-speed and low-power LVDS bidirectional transceiver IO cell powered at 2.5V/0.9V or 1.8V/0.9V, designed on the TSMC 40 G te...
2743
0.0
TSMC 40G 2Gb/s RX LVDS IO cell
The LSR25R/Z cell is a high-speed and low-power LVDS receiver IO cell powered at 2.5V/0.9V or 1.8V/0.9V, designed on the TSMC 40 G technology....
2744
0.0
TSMC 40G 2Gb/s TX LVDS IO cell
The LST25R/Z cell is a high-speed and low-power LVDS transmitter IO cell powered at 2.5V/0.9V or 1.8V/0.9V, designed on the TSMC 40 G technology....
2745
0.0
TSMC 40G Combo IO with 2Gb/s LVDS and CMOS GPIO
A Combo cell is an IO cell combining an LVDS receiver, driver or transceiver with a double CMOS GPIO (in, out or bidirectional) powered at 2.5V/0.9V o...
2746
0.0
TSMC 40LP 2Gb/s bidirectional LVDS IO cell
The LSB25R/Z cell is a high-speed and low-power LVDS bidirectional transceiver IO cell powered at 2.5V/1.1V or 1.8V/1.1V, designed on the TSMC 40 LP t...
2747
0.0
TSMC 40LP 2Gb/s RX LVDS IO cell
The LSR25R/Z cell is a high-speed and low-power LVDS receiver IO cell powered at 2.5V/1.1V or 1.8V/1.1V, designed on the TSMC 40 LP technology....
2748
0.0
TSMC 40LP 2Gb/s TX LVDS IO cell
The LST25R/Z cell is a high-speed and low-power LVDS transmitter IO cell powered at 2.5V/1.1V or 1.8V/1.1V, designed on the TSMC 40 LP technology....
2749
0.0
TSMC 40LP Combo IO with 2Gb/s LVDS and CMOS GPIO
A Combo cell is an IO cell combining an LVDS receiver, driver or transceiver with a double CMOS GPIO (in, out or bidirectional) powered at 2.5V/1.1V o...
2750
0.0
TSMC 65GP 2Gb/s bidirectional LVDS IO cell
The LSB25R/Z cell is a high-speed and low-power LVDS bidirectional transceiver IO cell powered at 2.5V/1.0V or 1.8V/1.0V, designed on the TSMC 65 GP t...