Design & Reuse
Catalog of SIP Cores
System on Chip design resources
arrow Arithmetic & Mathematic (72)
arrow Embedded Memories (996)
arrow I/O Library (1032)
arrow PLL (1747)
arrow Standard cell (756)
4603 IP
3701
0.0
GF L55LPE 55nm Spread Spectrum PLL - 120MHz-600MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
3702
0.0
GF L55LPE 55nm Spread Spectrum PLL - 240MHz-1200MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
3703
0.0
GF L55LPE 55nm Spread Spectrum PLL - 60MHz-300MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
3704
0.0
GF L55LPE 55nm Ultra PLL - 15MHz-3000MHz
The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...
3705
0.0
GF L55LPX 55nm Clock Generator PLL - 120MHz-600MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
3706
0.0
GF L55LPX 55nm Clock Generator PLL - 240MHz-1200MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
3707
0.0
GF L55LPX 55nm Clock Generator PLL - 60MHz-300MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
3708
0.0
GF L55LPX 55nm Deskew PLL - 120MHz-600MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
3709
0.0
GF L55LPX 55nm Deskew PLL - 240MHz-1200MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
3710
0.0
GF L55LPX 55nm Deskew PLL - 60MHz-300MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
3711
0.0
GF L55LPX 55nm General Purpose PLL - 120MHz-600MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...
3712
0.0
GF L55LPX 55nm IoT PLL - 30MHz-300MHz
The IoT PLL is designed for very low power, sipping only 45uW at 30MHz and running from core power. It has a wide frequency range with multiplication ...
3713
0.0
GF L55LPX 55nm Spread Spectrum PLL - 120MHz-600MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
3714
0.0
GF L55LPX 55nm Spread Spectrum PLL - 240MHz-1200MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
3715
0.0
GF L55LPX 55nm Spread Spectrum PLL - 60MHz-300MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
3716
0.0
GF L55LPX 55nm Ultra PLL - 15MHz-3000MHz
The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...
3717
0.0
GF L65G 65nm Ultra PLL - 15MHz-3000MHz
The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...
3718
0.0
GF L65LP 65nm IoT PLL - 30MHz-400MHz
The IoT PLL is designed for very low power, sipping only 45uW at 30MHz and running from core power. It has a wide frequency range with multiplication ...
3719
0.0
GF L65LP 65nm Ultra PLL - 15MHz-3000MHz
The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...
3720
0.0
GF L65LPE 65nm IoT PLL - 30MHz-300MHz
The IoT PLL is designed for very low power, sipping only 45uW at 30MHz and running from core power. It has a wide frequency range with multiplication ...
3721
0.0
GF L65LPE 65nm Ultra PLL - 15MHz-3000MHz
The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...
3722
0.0
GF L90LP 90nm IoT PLL - 30MHz-375MHz
The IoT PLL is designed for very low power, sipping only 45uW at 30MHz and running from core power. It has a wide frequency range with multiplication ...
3723
0.0
IGALVDT11A, TSMC CLN28HPC+/HPC/HPM LVDS RX PHY [8ch]
The IGALVDT11A is a TSMC CLN28HPC+/HPC/HPM 8-channel LVDS receiver PHY, which is used mainly in baseband IC and RFIC communication. An internal deskew...
3724
0.0
IGALVDT13A, TSMC 28nm HPC+ LVDS TX+RX I/O
IGALVDT13A, TSMC 28nm HPC+ LVDS TX+RX I/O...
3725
0.0
IGALVDT14A, TSMC CLN28HPC+ LVDS RX and CMOS Combo I/O
IGALVDT14A contains a receiver (RX) for LVDS interface and bi-derectional double CMOS. It supports the data rate up to 500Mbps. There is one macro ins...
3726
0.0
IGAPLLT06A, TSMC CLN28HPM/CLN28HPC+ Spread Spectrum PLL
The IGAPLLT06A is a customized Spread Spectrum Phase Locked Loop (SSPLL) without external components and is designed to provide a stable and accurate ...
3727
0.0
IGAPLLT08A, TSMC CLN28HPC & CLN28HPC+ General Purpose PLL
The IGAPLLT08A is a general purpose deskew Phase Locked Loop (PLL) without external component. It is designed to provide a stable and accurate refer...
3728
0.0
IGAPLLT12A, TSMC CLN28HPC+ General Purpose PLL
The “IGAPLLT12A” is a general purpose de-skew phase locked loop (PLL) without external component. The IGAPLLT12A incorporates several frequency divide...
3729
0.0
5GHz to 13.5GHz Phase Locked Loop (PLL) IP Block GFFDX 22nm FDSOI
The PLL13G is an ultra-low power phase locked loop (PLL) intellectual property (IP) block. The PLL13G features a very small area footprint, with excep...
3730
0.0
5GHz to 13.5GHz Phase Locked Loop (PLL) IP Block TSMC 130nm
The PLL13G is a ultra-low power phase locked loop (PLL) intellectual property (IP) block. It features a very small area footprint, with exception...
3731
0.0
1GHz to 3GHz, 6MHz to 100MHz Fractional-N LC Phase-Locked Loop
180TSMC_PLL_10 is designed to generate a high frequency signal in a range from 1GHz to 3GHz and a low frequency clock signal in a range from 6MHz to 1...
3732
0.0
3GHz to 6GHz Fractional-N LC Phase-Locked Loop
It is a phase-locked loop frequency synthesizer (PLL) with integer-N/fractional-N modes based on fully integrated wide band LC-VCO with range from 3 ...
3733
0.0
3GHz to 6GHz Integer-N LC Phase-Locked Loop
065TSMC_PLL_08 is an integer-N phase-locked loop frequency synthesizer (PLL) based on fully integrated wide band LC-VCO with range from 3 GHz to 6 G...
3734
0.0
RGMII IO Pad Set
The (R)GMII library provides the combo driver / receiver and required support cells for (R)GMII signaling. The libraries are compliant with the Gigabi...
3735
0.0
Charge pump
Charge pump (CP) is a switched current sources controlled by phase-frequency detector which injects or removes some charge to increase or decrease VCO...
3736
0.0
The SST SuperFlash® IP is an embedded CMOS Flash memory IP with sector/chip Erase and byte Program capability.
SuperFlash® is SST’s patented and proprietary NOR flash technology. With 80B+ devices shipped, SuperFlash is the non-volatile memory of choice for emb...
3737
0.0
PHYIO for PSRAM memory PHY, 1066Mbps
The PHYIOs is used to transfer the Command/Address/Clk and Data between the memory controller PHY and the PSRAM device. The TX is designed to send inf...
3738
0.0
Bi-Directional LVDS with LVCMOS
BiDirectional LVDS IO circuit combines LVDS driver and receiver circuits to enable a single pair of IO pads to function as a 1.5Gbps bi-directional LV...
3739
0.0
Library of LVDS IOs cells for TSMC 40G
The nSIO2000_TS40G_2V5_0V9 library is an IO cells library combining various LVDS and general purpose I/O powered at 2.5V/0.9V or 1.8V/0.9V, designed o...
3740
0.0
Library of LVDS IOs cells for TSMC 65GP
The nSIO2000_TS65GP_2V5_1V0 library is an IO cells library combining various LVDS and general purpose I/O powered at 2.5V/1.0V or 1.8V/1.0V, designed ...
3741
0.0
Library of LVDS Ios cells in HHGrace 130nm~55nm
This IP is a total solution for LVDS applications, including LVDS transmitter I/O, receiver I/O, common block and power/ground I/O. LVDS transmitter a...
3742
0.0
Library of LVDS Ios cells in HLMC 28nm
This IP is a total solution for LVDS applications, including LVDS transmitter I/O, receiver I/O, common block and power/ground I/O. LVDS transmitter a...
3743
0.0
Library of LVDS Ios cells in SMIC 130nm~28nm
This IP is a total solution for LVDS applications, including LVDS transmitter I/O, receiver I/O, common block and power/ground I/O. LVDS transmitter a...
3744
0.0
Library of LVDS Ios cells in TSMC 180nm~22nm
This IP is a total solution for LVDS applications, including LVDS transmitter I/O, receiver I/O, common block and power/ground I/O. LVDS transmitter a...
3745
0.0
Wide-range LVDS Video Interface
Flexible video deserializer capable of receiving 18bit, 24bit, and 30bit video data with embedded sync and control carried over four or five serial LV...
3746
0.0
Wide-range LVDS Video Interface
Flexible video serializer capable of transmitting 18bit, 24bit, and 30bit video data with embedded sync and control over four or _x000c_five LVDS outp...
3747
0.0
High Speed 1.5GHz Frac-N PLL IP Core
A programmable on-the-fly Fractional-N PLL at 1.5GHz is required to lock to an incoming clock source and produce an output clock available at 22nm...
3748
0.0
High Speed Fractional PLL with SSC
The PLL IP is a high speed, wide range, fractional PLL with SSC feature...
3749
0.0
High Speed Low Jitter 16GHz Output LC PLL
Terminus Circuits offers an Analog Phase Locked Loop which is a LC oscillator-based integer-N PLL IP powered at 900 mV. The PLL operates with input re...
3750
0.0
Eight Channel (8CH) LVDS Serializer in Samsung 28FDSOI
The 28FDSOI-LVDS-1250-8CH-TX-PLL is a high performance 8-channel LVDS Serializer implemented using digital CMOS technology. Both the serial and parall...