Design & Reuse
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2805 IP
401
2.0
CML I/O Pad Set
The CML library provides a differential clock driver, a voltage reference, and power cells to support REFCLK signaling for PCIe applications....
402
2.0
CML I/O Pad Set
The CML library provides a differential current mode logic clock driver to support REFCLK signaling in PCIe applications along with a CML voltage refe...
403
2.0
ONFI 4 IO Pad Set
The ONFI 4.0 library provides the combo driver / receiver cells, the ODT / driver impedance calibration cell, and the voltage reference cell to suppor...
404
2.0
ONFI 4.1 I/O Pad Set
The ONFI 4.1 library provides the combo driver / receiver cells, the ODT / driver impedance calibration cell, and the voltage reference cell to supp...
405
2.0
ONFI_3 IO Pad Set
The ONFI 3.0 library provides the combo driver / receiver cells, the ODT / driver impedance calibration cell, and the voltage reference cell to suppor...
406
2.0
ONFI_3 IO Pad Set
The ONFI 3.0 library provides the combo driver / receiver cells, the ODT / driver impedance calibration cell, and the voltage reference cell to suppor...
407
2.0
ONFI_4 IO Pad Set
The ONFI 4.1 library provides the combo driver / receiver cells, the ODT / driver impedance calibration cell, and the voltage reference cell to suppor...
408
2.0
ONFI_4 IO Pad Set
The ONFI 4.0 library provides the combo driver / receiver cells, the ODT / driver impedance calibration cell, and the voltage reference cell to suppor...
409
2.0
Cosine Function
Function y = cos(x) calculates the cosine of an angle in radians. It has a high-speed, fully pipelined architecture and uses a polynomial with dynamic...
410
2.0
LPDDR2 / LPDDR3 / DDR3 / DDR3L / DDR3U / DDR4 Combo I/O Pad Set
The LPDDR2/3_DDR3/4 library includes the combo driver/receiver cells with embedded power cells, the driver impedance calibration cell, and a full comp...
411
2.0
LPDDR2 / LPDDR3 / DDR3 / DDR3L / DDR3U / DDR4 Combo I/O Pad Set
The LPDDR2/3_DDR3/4 library includes the combo driver/receiver cells with embedded power cells, the driver impedance calibration cell, and a full comp...
412
2.0
Arctan Function
Function y = atan(x) calculates the inverse tangent of a fraction. It has a high-speed, fully pipelined architecture and uses a polynomial with dynam...
413
2.0
USB 2.0 OTG ESD Protection I/O Pad Set
The USB 2.0 OTG ESD Protection library provides a comprehensive ESD solution for USB 2.0 hard macro cells....
414
2.0
ESD Protection
The ESD Protection library provides ESD protection components. In addition to core-placeable ESD protection cells, discrete components (RF diodes and ...
415
2.0
HSTL I/O Pad Set
The HSTL library includes the driver / receiver cells and a full complement of power and support cells for both single-ended and differential signalin...
416
2.0
SSTL with bi-directional I/O’s, Vref, and ODT for DDR2 memory (1.8 V)
The DDR2 / DDR3 library includes the combo driver / receiver cells and a full complement of power and support cells for both single-ended and differen...
417
2.0
SSTL_ I/O Pad Set
The SSTL_2 pad set is a full complement of I/O, power, and spacer cells (total of 14 cells) that are necessary to assemble a padring by abutment. Sinc...
418
2.0
SSTL_15 / SSTL_18 Combo I/O Pad Set
The SSTL_15_18 combo pad set supports bidirectional single-ended and differential SSTL_15 and SSTL_18 signaling. The driver/receiver pairs, with embe...
419
2.0
SSTL_15 / SSTL_18 Combo I/O Pad Set
The SSTL_15 / SSTL_18 library supports bidirectional single-ended and differential SSTL_15 and SSTL_18 signaling. The driver/receiver pairs, with emb...
420
2.0
SSTL_15 IO Pad Set
The SSTL_15 pad set supports bidirectional single-ended and differential SSTL_15 signaling. The driver/receiver pairs, with embedded power cells, ar...
421
2.0
SSTL_15 IO Pad Set
The SSTL_15 library supports bidirectional single-ended and differential SSTL_15 signaling. The driver/receiver pairs, with embedded power cells, are...
422
2.0
subLVDS I/O Pad Set
The subLVDS library provides a subLVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data...
423
2.0
subLVDS IO Pad Set
The subLVDS library provides an subLVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data ...
424
2.0
subLVDS IO Pad Set
The subLVDS library provides an subLVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data ...
425
2.0
5V Programmable GPIO
The 5V General Purpose I/O libraries provide bidirectional I/O, analog I/O, and a full complement of I/O power, core power, and analog power cells alo...
426
2.0
LVDS I/O Pad Set
The LVDS library provides an LVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data rate...
427
2.0
LVDS I/O Pad Set
The LVDS library provides an LVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data rates ...
428
2.0
LVDS I/O Pad Set
The LVDS library provides an LVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data rates ...
429
2.0
LVDS I/O Pad Set
The LVDS library provides an LVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data rates ...
430
2.0
LVDS I/O Pad Set
The LVDS library provides an LVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data rate...
431
2.0
LVDS IO Pad Set
The LVDS library provides an LVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data rates ...
432
2.0
LVDS IO Pad Set
The LVDS library provides an LVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data rates ...
433
2.0
LVDS IO Pad Set
The LVDS library provides an LVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data rates ...
434
1.0
4 Gbps DDR CML receiver and transmitter
055TSMC_CML_01 is a library including: - CML receiver (CML_RX); - CML transmitter (CML_TX). The CML_RX block is intended to receive a CML signal a...
435
1.0
1.6 Gbps DDR Programmable LVDS Transmitter/Receiver
090TSMC_LVDS_02 consists of transmitter (LVDSOUT), receiver (LVDSIN) and a bias. The LVDS transmitter consists of a current source (nominal 3.5mA) tha...
436
1.0
3.6Kbit EEPROM IP with configuration 28p8w16bit
GF130_EEPROM_01 is a nonvolatile electrically erasable programmable read-only memory (EEPROM) with volume 3.6Kbit, which is organized as 28 pages of 8...
437
1.0
I/O:Ultra Small Size Dup-Pad total solution
...
438
1.0
I/O:Ultra Small Size Dup-Pad total solution
...
439
1.0
800MHz LVDS Cell Set for 180nm
The OT3910 is a set of cells for implementing 800Mb DDR (400MHz) LVDS IO in 180n CMOS processes. Includes transmitter and receiver IO's. Also core ...
440
1.0
1024-bit EEPROM IP with configuration 32p2w16bit
The block is a nonvolatile electrically erasable programmable read-only memory (EEPROM) with volume 1024 bits (16(bit per word) x 2(word per page) x 3...
441
1.0
512X1 MTP
XRO018BICMTP_512X1A is a BCD compatible embedded non-volatile memory IP with 64X16 ROM density. This IP could be used for code storage, firmware upda...
442
1.0
128x8 MTP
XRS018BCDMTP_128x8 is a BCD compatible embedded non-volatile memory IP with 128x8 ROM density. This IP could be used for code storage, firmware updat...
443
1.0
32:1 serializer followed by sub-LVDS drivers
The CCP2 transmitter consists of a 32:1 serializer followed by LVDS drivers for transmitting clock (or strobe) and data. The LVDS drivers operate in s...
444
1.0
32K8 MTP
XRF018BCDMTP_32K8 is a BCD compatible embedded non-volatile memory IP with 32K8 ROM density. This IP could be used for code storage, firmware update,...
445
1.0
64X16 MTP
XRS018BCDMTP_64X16 is a BCD compatible embedded non-volatile memory IP with 64X16 ROM density. This IP could be used for code storage, firmware updat...
446
1.0
650M LVDS transmitter, 5 channel
The LVDS transmitter is designed to support Single Link transmission between Host and Flat Panel Display with up to SXGA+ resolution and Dual Link tra...
447
1.0
16K16 MTP
XRS011LGCLFLASH_16K16 is a logic compatible embedded non-volatile memory IP with 16K16 ROM density. This IP could be used for code storage, firmware ...
448
1.0
16K16 MTP
XRS013LGCLFLASH_16K16 is a logic compatible embedded non-volatile memory IP with 16K16 ROM density. This IP could be used for code storage, firmware ...
449
1.0
16K16 MTP
XRX015LGCLFLASH_16K16 is a logic compatible embedded non-volatile memory IP with 16K16 ROM density. This IP could be used for code storage, firmware ...
450
1.0
16K32 MTP
XRS011LGCMTP_16K32 is a logic compatible embedded non-volatile memory IP with 16K32 ROM density. This IP could be used for code storage, firmware upd...