Design & Reuse
Catalog of SIP Cores
System on Chip design resources
arrow DDR (708)
arrow eMMC (21)
arrow Flash Controller (11)
arrow HBM (43)
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arrow SDRAM Controller (1)
arrow SRAM/SDRAM Controller (112)
arrow Other (7)

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708 IP
701
0.0
TSMC CLN7FFLVT 7nm LPDDR5 PHY - 6400Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...
702
0.0
PSRAM PHY
The INNOSILICON DDR IPTM Mixed-Signal PSRAM PHY provides turnkey physical interface solutions for ICs requiring access to JEDEC compatible PSRAM devic...
703
0.0
PSRAM/RPC PHY & Controller
INNOSILICON™ PSRAM IP consists of a configurable PHY and RPC PHY and a controller. It provides the physical interface solutions for ICs requiring acce...
704
0.0
Synopsys DDR5 MRDIMM2 PHY IP for TSMC N3P
The Synopsys DDR5 MRDIMM2 PHY IP is part of a complete IP solution including PHY and Controller enabling ASIC, Application-specific standard products ...
705
0.0
Synopsys DDR5 PHY IP for TSMC N4C
The Synopsys DDR5/4 PHY is a complete physical layer IP interface (PHY) solution for ASIC, ASSP, and system-on-chip (SoC) applications requiring high-...
706
0.0
Synopsys LPDDR Controller for LPDDR6, LPDDR5X and LPDDR5
Synopsys LPDDR6/5X/5 Controller IP is a next generation controller optimized for power, latency, bandwidth, and area, supporting JEDEC standard LPDDR6...
707
0.0
Synopsys LPDDR6/5X/5 PHY IP for TSMC N2P
The Synopsys LPDDR6/5X/5 PHY IP enables ASICs, ASSPs, system-on-chips (SoCs), and system-in-package applications requiring high-performance LPDDR6, LP...
708
0.0
Synopsys LPDDR6/5X/5 PHY IP for TSMC N3P
The Synopsys LPDDR6/5X/5 PHY IP enables ASICs, ASSPs, system-on-chips (SoCs), and system-in-package applications requiring high-performance LPDDR6, LP...