Design & Reuse
Catalog of SIP Cores
System on Chip design resources
arrow DDR (704)
arrow eMMC (21)
arrow Flash Controller (11)
arrow HBM (43)
arrow NAND Flash (36)
arrow NVM Express (24)
arrow ONFI Controller (8)
arrow SD/SDIO Controller (17)
arrow SRAM/SDRAM Controller (112)
arrow Other (7)

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704 IP
701
0.0
Synopsys DDR5 PHY IP for TSMC N4C
The Synopsys DDR5/4 PHY is a complete physical layer IP interface (PHY) solution for ASIC, ASSP, and system-on-chip (SoC) applications requiring high-...
702
0.0
Synopsys LPDDR Controller for LPDDR6, LPDDR5X and LPDDR5
Synopsys LPDDR6/5X/5 Controller IP is a next generation controller optimized for power, latency, bandwidth, and area, supporting JEDEC standard LPDDR6...
703
0.0
Synopsys LPDDR6/5X/5 PHY IP for TSMC N2P
The Synopsys LPDDR6/5X/5 PHY IP enables ASICs, ASSPs, system-on-chips (SoCs), and system-in-package applications requiring high-performance LPDDR6, LP...
704
0.0
Synopsys LPDDR6/5X/5 PHY IP for TSMC N3P
The Synopsys LPDDR6/5X/5 PHY IP enables ASICs, ASSPs, system-on-chips (SoCs), and system-in-package applications requiring high-performance LPDDR6, LP...