Design & Reuse
633 IP
51
14.0
Denali High-Speed DDR PHY for UMC
Provides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area Developed by experienced ...
52
11.0
DDR5/4 PHY & Controller
DDR5/4 PHY & Controller...
53
11.0
LPDDR5/5X PHY & Controller
High performance, low power and area efficient memory interface solutions conforming to LPDDR5/5X (JESD209-5C) JEDEC standard...
54
10.0
DDR and LPDDR 5/4/3/2 controllers for low power and high Reliability, Availability and Serviceability (RAS)
Synopsys offers a complete system-level memory interface IP portfolio for SoCs requiring an interface to one or a range of high-performance DDR5, DDR4...
55
10.0
DDR2/DDR3/DDR3L/LPDDR2 I/O Buffer - TSMC 40 CLN40LP
Analog Bits impedance programmable I/O buffer provides a high-speed physical interface solution to support the increasing bandwidths demanded by today...
56
10.0
DDR4 multiPHY in Samsung (14nm)
The Synopsys DDR4 multiPHY is a complete physical (PHY) layer IP interface solution for PC/consumer and mobile ASICs, ASSPs, system-on- chip (SoC), an...
57
10.0
DDR4 multiPHY in TSMC (28nm)
The Synopsys DDR4 multiPHY is a complete physical (PHY) layer IP interface solution for PC/consumer and mobile ASICs, ASSPs, system-on- chip (SoC), an...
58
10.0
DDR4 multiPHY in UMC (28nm)
The Synopsys DDR4 multiPHY is a complete physical (PHY) layer IP interface solution for PC/consumer and mobile ASICs, ASSPs, system-on- chip (SoC), an...
59
10.0
DDR4/3 PHY in Samsung (14nm, 11nm, 10nm, 8nm)
The Synopsys DDR4/3 PHY is a complete physical layer IP interface (PHY) solution for enterprise-class ASIC, ASSP, and system-on-chip (SoC) application...
60
10.0
DDR4/3 PHY in TSMC (12nm, 16nm, 7nm)
The Synopsys DDR4/3 PHY is a complete physical layer IP interface (PHY) solution for enterprise-class ASIC, ASSP, and system-on-chip (SoC) application...
61
10.0
DDR5 PHY in Samsung (SF2, SF4X)
The Synopsys DDR5/4 PHY is a complete physical layer IP interface (PHY) solution for ASIC, ASSP, and system-on-chip (SoC) applications requiring high-...
62
10.0
DDR5/4 PHY in GF (12nm)
The Synopsys DDR5/4 PHY is a complete physical layer IP interface (PHY) solution for ASIC, ASSP, and system-on-chip (SoC) applications requiring high-...
63
10.0
DDR5/4 PHY in Samsung (10nm, 8nm, 7nm)
The Synopsys DDR5/4 PHY is a complete physical layer IP interface (PHY) solution for ASIC, ASSP, and system-on-chip (SoC) applications requiring high-...
64
10.0
DDR5/4 PHY in TSMC (16nm, 12nm, N6, N7, N5)
The Synopsys DDR5/4 PHY is a complete physical layer IP interface (PHY) solution for ASIC, ASSP, and system-on-chip (SoC) applications requiring high-...
65
10.0
DDR5/4 PHY V2 in TSMC (N7, N6, N4C, N5)
The Synopsys DDR5/4 PHY is a complete physical layer IP interface (PHY) solution for ASIC, ASSP, and system-on-chip (SoC) applications requiring high-...
66
10.0
High performance and low latency hardware accelerated zram/zswap at unmatched power efficiency
The SuperRAM implements a hardware accelerator for zram compression and decompression. SuperRAM implements a ZeroPoint proprietary compression algorit...
67
6.0
Single-port 16/32/64-bit DDR266 Controller
The Single-port 16/32/64 bit DDR266 controller IP core is a DDR266 SDRAM controller AMBA AHB back-end. The controller can interface two 16-, 32- or 64...
68
5.0
DDR3/4 and LPDDR2/3/4/4x Combo PHY&MAC
With sophisticated architecture and advanced technology, this DDR3/4 and LPDDR2/3/4/4x IP combo solution with high performance and low power. In 12~28...
69
4.0
DDR3/ 3L/ DDR4/ LPDDR4 PHY, 22nm Technology
The DDR3, DDR3L, DDR4, and LPDDR4 Combo PHY is designed for easy integration into any System-On-Chip (SOC) and can be seamlessly connected to a third-...
70
4.0
DDR3/DDR4 IP solution with high performance and low power
With sophisticated architecture and advanced technology, KNiulink provide DDR3/DDR4 IP solution with high performance and low power. KNiulink could o...
71
3.0
DDR2 & DDR3 Fault Tolerant Memory Controller
FTADDR is a memory controller for DDR2 and DDR3 SDRAM memory devices. It uses a strong error correction code to achieve exceptional fault tolerance. ...
72
3.0
LPDDR2/3/4/4x IP combo solution with high performance and low power
With sophisticated architecture and advanced technology, this LPDDR2/3/4/4x IP combo solution with high performance and low power. In 12~28nm CMOS pro...
73
1.0
MCR DDR5 PHY
The INNOSILICON DDR Mixed-Signal MCR DDR5 PHY provides turnkey physical interface solutions for ICs requiring access to JEDEC compatible MCR DDR5 DIMM...
74
1.0
GDDR6X/6 Combo PHY&Controller
Innosilicon GDDR6/6X Combo IP is fully compliant to the JEDEC GDDR6/6X standard, supporting up to 16Gbps per pin for PAM2 GDDR6 and 21Gbps for PAM4 GD...
75
1.0
GDDR7 PHY & Controller
Innosilicon GDDR7 PHY is fully compliant to the JEDEC GDDR7 standard, supporting up to 32Gbps for PAM3 GDDR7. In pam3 mode, the byte consists of ten D...
76
1.0
DDR3/3L/2 Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal DDR3/3L/2 COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compatible S...
77
1.0
DDR3/3L/2/LPDDR3/2 Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal DDR3/3L/2/LPDDR3/2 COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC com...
78
1.0
DDR4/3 Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal DDR4/3 COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compatible SDRA...
79
1.0
DDR4/3/2 Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal DDR4/3/2 PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compatible SDRAM de...
80
1.0
DDR4/3/3L/LPDDR3 Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal DDR4/3/3L/LPDDR3 COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compa...
81
1.0
DDR4/3/LPDDR3 Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal DDR4/3/LPDDR3 COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compatib...
82
1.0
DDR4/3/LPDDR4/3 Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal DDR4/3/LPDDR4/4X/3 COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC com...
83
1.0
DDR4/3/LPDDR4X/4/3 Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal DDR4/3/LPDDR4/4X/3 COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC com...
84
1.0
DDR4/LPDDR4/3 Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal DDR4/LPDDR4/3 COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compatib...
85
1.0
DDR4/LPDDR4/4X/3 Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal DDR4/LPDDR4/4X/3 COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compa...
86
1.0
DDR4/LPDDR4X/4 Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal LPDDR4/4X/DDR4 PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compatible SD...
87
1.0
DDR5/4 Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal DDR5/4 Combo PHY s provide turnkey physical interface solutions for ICs requiring access to JEDEC compatible SDR...
88
1.0
INNOLINK Chiplet PHY&Controller
Innosilicon INNOLINK™ IP provides a leading-edge chiplet solution allowing massive amounts of low-latency data to pass seamlessly between smaller chi...
89
1.0
INNOLINK-B Controller
The INNOLINK Controller (ILC) combined with INNOLINK PHY is a complete solution for high speed data communication between dies or chips. INNOLIN, GDDR...
90
1.0
INNOLINK-B PHY
Innosilicon can provide different Die2Die solution for customer depend on package type, Following is Innosilicon Die2Die IP family: Innolink-A, Serde...
91
1.0
INNOLINK-C Controller
The INNOLINK-C Controller (hereinafter referred to as “ILC”) combined with INNOLINK-C PHY is a complete solution for high-speed data communication bet...
92
1.0
INNOLINK-C PHY
Innosilicon can provide different Die-to-Die and Chip-to-Chip solutions for customer according to package types. The followings are Innosilicon Die-to...
93
1.0
LPDDR2 PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal LPDDR2 PHY provides turnkey physical interface solutions for ICs requiring access to JEDEC compatible SDRAM devi...
94
1.0
LPDDR3/2 Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal LPDDR3/2 COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compatible SD...
95
1.0
LPDDR3/2/DDR3/3L Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal LPDDR2/3/DDR3/3L COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compa...
96
1.0
LPDDR3/2/DDR3/3L/2 Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal LPDDR3/2/DDR3/3L/2 COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC com...
97
1.0
LPDDR4X/4 Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal LPDDR4 PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compatible SDRAM devi...
98
1.0
LPDDR4X/4/3 Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal LPDDR4X/4/3 PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compatible SDRAM...
99
1.0
LPDDR4X/4/DDR4/LPDDR3 Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal LPDDR4/4X/DDR4/LPDDR3 PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compat...
100
1.0
LPDDR5/4X/4 Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal LPDDR5/4/4X COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compatible...