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633 IP
351
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DDR3 Controller IP
DDR3 interface provides full support for the DDR3 interface, compatible with JESD79-3F specification and DFI-version 2.0 or higher Specification Compl...
352
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DDR3 PHY
Designed for server, networking, computing and consumer applications, our DDR4 multi-modal memory PHY is optimized for performance The DDR4 multi-mod...
353
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DDR3 SDRAM Controller IP with advance feautures package
DDR3 interface provides full support for the DDR3 interface, compatible with JESD79-3F specification and DFI-version 2.0 or higher Specification Compl...
354
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DDR3/ DDR2 Combo PHY IP - 1866Mbps (Silicon Proven in UMC 40LP)
The DDR3/2 PHY is compatible with JEDEC DDR3 and JEDEC DDR2 SDRAMs, supports a range of DDR3 DRAM speeds from 666Mbps to1866Mbps and DDR2 DRAM speeds ...
355
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DDR3/ DDR3L Combo PHY IP - 1600Mbps (Silicon Proven in UMC 40LP)
This DDR PHY IP(Double Data Rate) supports DRAM type DDR3, DDR3L this PHY provides low latency, and enables up to 1600Mbps throughput. The DDR IP is c...
356
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DDR34/LPDDR23 in SMIC 40NLL
Brite Semiconductor provides a complete DDR subsystem including not only controller, PHY and IO, also corresponding tuning and configuration software....
357
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DDR34/LPDDR34 PHY in SMIC 28HKC+
Brite Semiconductor provides a complete DDR subsystem including not only controller, PHY and IO, also corresponding tuning and configuration software....
358
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DDR34/LPDDR34 PHY in SMIC 28HKD 0.9/1.8V
Brite Semiconductor provides a complete DDR subsystem including not only controller, PHY and IO, also corresponding tuning and configuration software....
359
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DDR34/LPDDR34 PHY in SMIC 28HKD 0.9/2.5V
Brite Semiconductor provides a complete DDR subsystem including not only controller, PHY and IO, also corresponding tuning and configuration software....
360
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DDR3L Controller IP
DDR3L interface provides full support for the DDR3L interface, compatible with DDR3L protocol standard of 8GB_DDR3L and DFI-version 3.1 or higher Spec...
361
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DDR3L Memory Controller IP optimized for low latency
DDR3L interface provides full support for the DDR3L interface, compatible with DDR3L protocol standard of 8GB_DDR3L and DFI-version 3.1 or higher Spec...
362
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DDR3L/ LPDDR4/ DDR4 PHY IP - 1866Mbps (Silicon Proven in UMC 28HPC+)
The DDR3L/ DDR4/ LPDDR4 Combo PHY IP offers low latency and supports throughput of up to 1866Mbps. The PHY IP is silicon validated in the UMC 28HPC+ p...
363
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DDR4 / DDR3/ DDR3L / LPDDR4 Memory Controller IP optimized for low latency
The DDR (Double Data Rate) controller IP is for LPDDR4 and DDR4/3/3L optimized for low latency. The Controller IP is silicon proven and connects to DD...
364
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DDR4 Controller IP
DDR4 is full-featured, easy-to-use, synthesizable design, compatible with DDR4 JESD79-4, JESD79-4A, JESD79-4A_r2, JESD79-4B, JESD79-4C and JESD79-4D ...
365
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DDR4 in SMIC 55NLL
Brite Semiconductor provides a complete DDR subsystem including not only controller, PHY and IO, also corresponding tuning and configuration software....
366
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DDR4 Memory Controller IP with high performance
DDR4 is full-featured, easy-to-use, synthesizable design, compatible with DDR4 JESD79-4, JESD79-4A, JESD79-4A_r2, JESD79-4B, JESD79-4C and JESD79-4D (...
367
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DDR4 Multi-modal PHY
Designed for server, networking, computing and consumer applications, our DDR4 multi-modal memory PHY is optimized for performance The DDR4 multi-mod...
368
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DDR4 PHY
Designed for server, networking, computing and consumer applications, our DDR4 multi-modal memory PHY is optimized for performance The DDR4 multi-mod...
369
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DDR4/ DDR3 Combo PHY IP - 2400Mbps (Silicon Proven in UMC 28HPC+)
The DDR4/3 PHY is compatible with JEDEC DDR3 and JEDEC DDR4 SDRAMs, supports a range of DDR3 DRAM speeds from 666Mbps to 2133Mbps and DDR4 DRAM speeds...
370
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DDR4/ DDR3/ DDR3L Combo PHY IP - 1600Mpbs (Silicon Proven in TSMC 28HPC+)
This DDR (Double Data Rate) PHY IP supports DDR3/DDR3L/DDR4, provides low latency, and enables up to 1600Mbps throughput. The PHY IP is silicon proven...
371
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DDR4/ LPDDR4/ DDR3L PHY IP - 1866Mbps (Silicon Proven in TSMC 28HPC+)
The LPDDR4/ DDR4/ DDR3L Combo PHY IP offers low latency and supports throughput of up to 1866Mbps. The PHY IP is silicon validated in the TSMC 28HPC+ ...
372
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DDR4/ LPDDR4/ DDR3L PHY IP - 3200Mbps (Silicon Proven in TSMC 12FFC)
The DDR4/ DDR3L/ LPDDR4 Combo PHY IP provides low latency and enables up to 3200Mbps throughput. The PHY IP is compliant with the latest JEDEC standar...
373
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DDR4/3 Memory PHY for TSMC N7
Provides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area The latest, the Denali Hi...
374
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DDR4/LPDDR4/LPDDR4X PHY
M31 LPDDR4X multi-PHY supports both LPDDR4 and LPDDR4X memory interfaces at speed up to 4267Mbps, making it an ideal solution for ASICS, ASSPs, SOC an...
375
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DDR5 Controller IP
DDR5 is full-featured, easy-to-use, synthesizable design, compatible with DDR5 JESD79-5 specification and DFI-version 5.0 Compliant. Through its DDR5 ...
376
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DDR5 Memory Controller IP with Advanced Feautures
DDR5 is full-featured, easy-to-use, synthesizable design, compatible with DDR5 JESD79-5 and JESD79-5 Rev1.40 (Draft) specification and DFI-version 5.0...
377
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DDR5 Memory PHY for Samsung SF5A Automotive
Provides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area The latest, the DDR5 PHY ...
378
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DDR5 Memory PHY for TSMC N3P
Provides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area The latest, the DDR5 PHY ...
379
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DDR5 Memory PHY for TSMC N4P
Provides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area The latest, the DDR5 PHY ...
380
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DDR5 Memory PHY for TSMC N5P
Provides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area The latest, the DDR5 PHY ...
381
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DDR5 MRDIMM2 PHY in TSMC (N3P, N2P)
The Synopsys DDR5/4 PHY is a complete physical layer IP interface (PHY) solution for ASIC, ASSP, and system-on-chip (SoC) applications requiring high-...
382
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DDR5 PHY for SS SF4X
The Synopsys DDR5/4 PHY is a complete physical layer IP interface (PHY) solution for ASIC, ASSP, and system-on-chip (SoC) applications requiring high-...
383
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DDR5 PHY IP for TSMC N3P
The Synopsys DDR5/4 PHY is a complete physical layer IP interface (PHY) solution for ASIC, ASSP, and system-on-chip (SoC) applications requiring high-...
384
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DDR5/4 Memory PHY for Samsung SF5A Automotive
Provides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area The latest, the DDR5/4 PH...
385
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DDR5/4 Memory PHY for TSMC 16nm
Provides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area The latest, the DDR5/4 PH...
386
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DDR5/4 Memory PHY for TSMC N7
Provides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area The latest, the DDR5/4 PH...
387
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DDR5/4 PHY for Samsung 7LPP
Provides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area The latest, the DDR5/4 PH...
388
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DDR5/4/LPDDR5/4X PHY for TSMC for N5P
Lowest latency and highest data rates for data-intensive applications Developed by experienced teams with industry-leading domain expertise and exten...
389
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DFI LPDDR5 PHY IP
DFI LPDDR5 is full-featured, easy-to-use, synthesizable design, compatible with LPDDR5 JESD209-5 specification and DFI-version 5.0 Compliant. Through ...
390
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high performance and low power
With sophisticated architecture and advanced technology, KNiulink provide DDR5 with high performance and low power. In advanced process nodes, KNiuli...
391
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High Performance DDR 3/2 Memory Controller IP
This memory controller supports DDR2/3 SDRAM. DDR2/3 memory controller is a high-speed interface used for data read/write between internal engine and ...
392
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Up to 50% main memory bandwidth acceleration
The Ziptilion Bandwidth IP accelertes the main memory bandwidth with up to 50%. The IP core packages a novel and proprietary technology that accelerat...
393
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LPDDR Controller for LPDDR5X, LPDDR5 and LPDDR4X
Synopsys LPDDR5X/5/4X Controller is a next generation controller optimized for power, latency, bandwidth, and area, supporting JEDEC standard LPDDR5X,...
394
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LPDDR Controller IP
LPDDR is full-featured, easy-to-use, synthesizable design, compatible with JESD209A-1 and JESD209B specification. Through its LPDDR compatibility, it ...
395
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LPDDR2 Controller IP
LPDDR2 interface provides full support for the LPDDR2 interface, compatible with JESD209-2E and JESD209-2F specification. Through its LPDDR2 compatibi...
396
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LPDDR3 Controller IP
LPDDR3 interface provides full support for the LPDDR3 interface, compatible with JESD209-3,JESD209-3B and JESD209-3C specification. Through its LPDDR3...
397
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LPDDR4 Controller IP
LPDDR4 is full-featured, easy-to-use, synthesizable design, compatible with LPDDR4 JESD209-4, JESD209-4A, JESD209-4B, JESD209-4C, JESD209-4X and JESD2...
398
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LPDDR4 multiPHY V2 in UMC (28nm)
The Synopsys LPDDR4 multiPHY is Synopsys’ second generation physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and sy...
399
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LPDDR4/ DDR4/ DDR3L PHY IP - 1866Mbps (Silicon Proven in TSMC 28HPC+)
The LPDDR4/ DDR4/ DDR3L Combo PHY IP offers low latency and supports throughput of up to 1866Mbps. The PHY IP is silicon validated in the TSMC 28HPC+ ...
400
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LPDDR4/DDR4/DDR3 PHY - TSMC 22nmULL
SP-LPD4/D43_PHY16BIT-T22ULL is designed for DRAM controller to connect to the LPDDR4/DDR4/3 DRAM memory device. It contains a DDR PHY Control Unit(DPC...