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673 IP
401
0.0
INNOLINK-B Controller
The INNOLINK Controller (ILC) combined with INNOLINK PHY is a complete solution for high speed data communication between dies or chips. INNOLIN, GDDR...
402
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INNOLINK-B PHY
Innosilicon can provide different Die2Die solution for customer depend on package type, Following is Innosilicon Die2Die IP family: Innolink-A, Serde...
403
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INNOLINK-C Controller
The INNOLINK-C Controller (hereinafter referred to as “ILC”) combined with INNOLINK-C PHY is a complete solution for high-speed data communication bet...
404
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INNOLINK-C PHY
Innosilicon can provide different Die-to-Die and Chip-to-Chip solutions for customer according to package types. The followings are Innosilicon Die-to...
405
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Up to 50% main memory bandwidth acceleration
The Ziptilion Bandwidth IP accelertes the main memory bandwidth with up to 50%. The IP core packages a novel and proprietary technology that accelerat...
406
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LPDDR Controller for LPDDR5X, LPDDR5 and LPDDR4X
Synopsys LPDDR5X/5/4X Controller is a next generation controller optimized for power, latency, bandwidth, and area, supporting JEDEC standard LPDDR5X,...
407
0.0
LPDDR Controller IP
LPDDR is full-featured, easy-to-use, synthesizable design, compatible with JESD209A-1 and JESD209B specification. Through its LPDDR compatibility, it ...
408
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LPDDR2 Controller IP
LPDDR2 interface provides full support for the LPDDR2 interface, compatible with JESD209-2E and JESD209-2F specification. Through its LPDDR2 compatibi...
409
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LPDDR2 PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal LPDDR2 PHY provides turnkey physical interface solutions for ICs requiring access to JEDEC compatible SDRAM devi...
410
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LPDDR3 Controller IP
SmartDV’s LPDDR3 Controller IP offers a high-performance and low-latency solution for integrating LPDDR3 memory interfaces into SoCs and FPGA-based sy...
411
0.0
LPDDR3/2 Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal LPDDR3/2 COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compatible SD...
412
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LPDDR3/2/DDR3/3L Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal LPDDR2/3/DDR3/3L COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compa...
413
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LPDDR3/2/DDR3/3L/2 Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal LPDDR3/2/DDR3/3L/2 COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC com...
414
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LPDDR4 Controller IP
SmartDV’s LPDDR4 Controller IP is a high-performance solution designed to enable fast, power-efficient memory access in mobile, automotive, and high-p...
415
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LPDDR4 multiPHY V2 in UMC (28nm)
The Synopsys LPDDR4 multiPHY is Synopsys’ second generation physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and sy...
416
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LPDDR4/ DDR4/ DDR3L PHY IP - 1866Mbps (Silicon Proven in TSMC 28HPC+)
The LPDDR4/ DDR4/ DDR3L Combo PHY IP offers low latency and supports throughput of up to 1866Mbps. The PHY IP is silicon validated in the TSMC 28HPC+ ...
417
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LPDDR4/DDR4/DDR3 PHY - TSMC 22nmULL
SP-LPD4/D43_PHY16BIT-T22ULL is designed for DRAM controller to connect to the LPDDR4/DDR4/3 DRAM memory device. It contains a DDR PHY Control Unit(DPC...
418
0.0
LPDDR4X / LPDDR4 Controller
The Rambus LPDDR4X/4 controller core is designed for use in applications requiring high memory throughput at low power including mobile, Internet of ...
419
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LPDDR4X, LPDDR4, DDR4, LPDDR3 Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal LPDDR4/4X/DDR4/LPDDR3 PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compat...
420
0.0
LPDDR4X/4/3/DDR4 PHY for TSMC 12nm and 16nm
Lowest latency and highest data rates for data-intensive applications Developed by experienced teams with industry-leading domain expertise and ext...
421
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LPDDR4X/4/3/DDR4/3/3L PHY + Controller
INNOSILICON™ LPDDR4X/4/3/DDR4/3/3L Combo IP is a customizable Mixed-Signal DDR memory interface suite. The Combo IP provides turnkey physical interfac...
422
0.0
LPDDR5 Controller IP
SmartDV’s LPDDR5 Controller IP delivers high-bandwidth, low-latency memory access optimized for next-generation mobile, automotive, and AI/ML applicat...
423
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LPDDR5 IP - High performance and low power
With sophisticated architecture and advanced technology, KNiulink provide LPDDR5 with high performance and low power. In advanced process nodes, KNiu...
424
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LPDDR5/4/4X Controller with Inline Memory Encryption (IME) Security Module
SynopsysLPDDR5/4/4X Controller is a next generation controller optimized for power, latency, bandwidth, and area, supporting JEDEC standard LPDDR5, LP...
425
0.0
LPDDR5/4X COMBO PHY 7nm/6nm
The LPDDR5 and LPDDR4x Combo PHY is designed for easy integration into any System-On-Chip (SOC) and can be seamlessly connected with a third-party DFI...
426
0.0
LPDDR5/4X PHY IP for TSMC N7
Lowest latency and highest data rates for data-intensive applications The LPDDR PHY IP is comprised of architectural improvements to its highly suc...
427
0.0
LPDDR5/4x/4 PHY IP for Samsung 14LPU
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
428
0.0
LPDDR5/5X Memory PHY for TSMC N3P
Lowest latency and highest data rates for data-intensive applications The LPDDR PHY IP is comprised of architectural improvements to its highly suc...
429
0.0
LPDDR5/5X Memory PHY for TSMC N4P
Lowest latency and highest data rates for data-intensive applications The LPDDR PHY IP is comprised of architectural improvements to its highly suc...
430
0.0
LPDDR5/5X Memory PHY for TSMC N5P
Lowest latency and highest data rates for data-intensive applications The LPDDR PHY IP is comprised of architectural improvements to its highly suc...
431
0.0
LPDDR5X 7nm/6nm PHY
The InPsytech LPDDR5x PHY is a high-performance, low-power physical interface IP designed for seamless integration into any System-on-Chip (SoC). It c...
432
0.0
LPDDR5X Controller IP
LPDDR5X is full-featured, easy-to-use, synthesizable design, compatible with LPDDR5X draft JEDEC specification and DFI-version 5.0 specification Compl...
433
0.0
LPDDR5X PHY 3nm
The InPsytech LPDDR5x PHY is a high-performance, low-power physical interface IP designed for seamless integration into any System-on-Chip (SoC). It c...
434
0.0
LPDDR5X PHY 5nm/4nm
The InPsytech LPDDR5x PHY is a high-performance, low-power physical interface IP designed for seamless integration into any System-on-Chip (SoC). It c...
435
0.0
LPDDR5x/5 Driver SDK Starter Kit
The MOUNT MUIR LPDDR5x (MM-LPDDR5x) solution is a comprehensive SDK that enables users to easily implement functions and interface with LPDDR5X Memory...
436
0.0
LPDDR5x/5 IP Subystem (Processing Engine+Memory Controller+PHY+VIP+TestCases)
MEMTECH’ LPDDR5X (Low Power DDR5X) complete IP Subsystem is optimized to accelerate LPDDR5x IP subsystem development, minimize the subsystem integrati...
437
0.0
LPDDR5x/5 Synthesizable Verification IP
MEMTECH’ GT LPDDR5x/5 VIP is optimized for fast debug & system validation to help you reach highest memory performance resulting in lower time to trai...
438
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LPDDR5x/5 SystemC TLM Cycle Accurate Model
MEMTECH’ Mount Stanford-L series LPDDR5x Memory Controller SystemC Model can support customers with high-performance simulation model needs. This stan...
439
0.0
LPDDR5X/5/4X COMBO PHY
The LPDDR5x, LPDDR5, and LPDDR4x Combo PHY is designed for seamless integration into any System-on-Chip (SoC) and can easily connect to a third-party ...
440
0.0
LPDDR5X/5/4X Controller with Inline Memory Encryption (IME) Security Module
Synopsys LPDDR5X/5/4X Controller is a next generation controller optimized for power, latency, bandwidth, and area, supporting JEDEC standard LPDDR5X,...
441
0.0
LPDDR5X/5/4X PHY IP on TSMC N3P
The Synopsys LPDDR5X/5/4X PHY is Synopsys’ physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and system- in- package...
442
0.0
LPDDR6, LPDDR5X Combo PHY & Controller
INNOSILICON™ introduces its LPDDR6/5X PHY and Controller IP, purpose-built for the AI era’s high-performance chip design needs. This solution is fully...
443
0.0
LPDDR6/5X/5 PHY in TSMC (N3P, N2P)
The Synopsys LPDDR6/5X/5 PHY IP enables ASICs, ASSPs, system-on-chips (SoCs), and system-in-package applications requiring high-performance LPDDR6, LP...
444
0.0
LPDDR6/5X/5 PHY V2 in TSMC (N5A, N3A) for Automotive
The Synopsys LPDDR6/5X/5 PHY IP enables ASICs, ASSPs, system-on-chips (SoCs), and system-in-package applications requiring high-performance LPDDR6, LP...
445
0.0
LPDDR6/5X/5 PHY V2 in TSMC (N6, N5, N4P, N4C, N3P, N2P)
The Synopsys LPDDR6/5X/5 PHY IP enables ASICs, ASSPs, system-on-chips (SoCs), and system-in-package applications requiring high-performance LPDDR6, LP...
446
0.0
MRDIMM DDR5 & DDR5/4 PHY & Controller
INNOSILICON™ DDR5 IP includes the MRDIMM DDR5 PHY and DDR5/4 Combo PHY and corresponding controllers for ICs requiring access to JEDEC compatible SDRA...
447
0.0
TSMC CLN12FFCLL 12nm DDR3 PHY - 2133Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
448
0.0
TSMC CLN12FFCLL 12nm DDR4 PHY - 4266Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
449
0.0
TSMC CLN12FFCLL 12nm DDR5 PHY - 6400Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
450
0.0
TSMC CLN12FFCLL 12nm LPDDR3 PHY - 2133Mbps
The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...