Design & Reuse
4 IP
1
100.0
ApSRAM Controller
Mobiveil’s ApSRAM Controller is a highly flexible, low-latency, and low-power IP core designed to serve as a high-performance replacement for traditio...
2
80.0
OCTA SPI PSRAM Controller
THis controller supports Xccela open standard bus for digital interconnect and data communications suitable for Volatile and nonvolatile memories such...
3
9.0
32-bit SSRAM/PROM Controller
The 32-bit SSRAM/PROM Controller IP cores is an 32-bit SSRAM/PROM/IO controller that interfaces external Synchronous pipelined SRAM, PROM, and I/O to ...
4
0.118
SRAM/ROM Controller IP, SRAM/ROM Controller, Soft IP
Static memory controller with AXI interface....