Design & Reuse
3 IP
1
0.0
MIPI C-PHY v2.0 D-PHY v2.1 for TSMC N5A
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...
2
0.0
MIPI C-PHY v2.0 D-PHY v2.1 RX 3 trios/4 Lanes in Samsung (SF2A, SF4A) for Automotive
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...
3
0.0
MIPI C-PHY v2.0 D-PHY v2.1 RX for GF 12LP+
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...