Design & Reuse
Catalog of SIP Cores
System on Chip design resources
arrow AES Encryption Core (97)
arrow Cryptography (196)
arrow Data Integrity - Error Correction (1)
arrow Data Integrity - Error Correction (18)
arrow Embedded Security Modules (25)
arrow Hardware Accelerator (42)
arrow MACsec, IPsec (35)
arrow Post-Quantum Solutions (40)
arrow PUF Based (21)
arrow Random Number Generator (RNG) (17)
arrow Root of Trust (24)
arrow Security Platform (37)
arrow Sensors & Monitors (9)
562 IP
101
12.0
AES - XTS for Storage Encryption / Decryption Security Core
The AES-XTS encryption IP core implements encryption/decryption for sector-based storage data. It uses the AES block cypher, in compliance with the NI...
102
10.0
32-bit Public Key Accelerator
Public key cryptography requires complex mathematical operations on very large numbers (from 160 to 4096 bits, or more). The majority of embedded CPUs...
103
10.0
128-bit Public Key Accelerator
Public key cryptography requires complex mathematical operations on very large numbers (from 160 to 4096 bits, or more). The majority of embedded CPUs...
104
10.0
MAC MACsec Protocol Engine for 10/100/1000 Ethernet
The MAC-SEC-1G IP core implements a compact and configurable custom-hardware protocol engine for the IEEE 802.1AE (MACsec) standard. It supports all c...
105
10.0
Secure Boot Software Development Kit
Secure boot enhances the security of an embedded system by cryptographically verifying that the code being loaded and executed is authentic and has no...
106
10.0
Secure-IC's Securyzr™ ChaCha20-Poly1305 Crypto Engine
The ChaCha20-Poly1305 Crypto Engine is RFC7539 compliant to provide Authenticated Encryption with Associated Data (AEAD) using the ChaCha20 stream cip...
107
10.0
Secure-IC's Securyzr™ Deterministic Random Bit Generator (DRBG)
The Deterministic Random Bit Generator is an essential silicon-proven digital IP core for all FPGA, ASIC and SoC designs that targets cryptographicall...
108
10.0
Secure-IC's Securyzr™ Inline Decrypter IP Core
The Inline Decrypter IP Core enables on-the-fly execution of encrypted code from Flash. It is often used to protect the source code from decompiling o...
109
10.0
Secure-IC's Securyzr™ SHA-3 Crypto Engine
The SHA-3 crypto engine has integrated flexibility and scalability to allow for high throughput and a configurable number of hashing rounds per clock ...
110
10.0
Security Protocol Accelerator for SM3 and SM4
SM3 and SM4 are commercial cryptographic standards issued and regulated by the Chinese Office of State Commercial Cryptography Administration (OSCCA)...
111
10.0
Agile Secure Element
Our Agile Secure Element IP provides designers with the flexibility to customise security features according to specific application requirements with...
112
10.0
Digital Physical Unclonable Function (PUF) IP
Our Digital PUF IP is a digital version of our quantum-based PUF IP (see QDID). The Logic-based Digital PUF IP is a strong hardware root-of-trust for ...
113
10.0
KiviPQC-Box | Post-Quantum Cryptography (PQC) - Key Encapsulation and Digital Signature IP Core (ML-KEM & ML-DSA)
The KiviPQC-Box is an IP core that combines the algorithms ML-DSA and ML-KEM into one single package. ML-DSA and ML-KEM are algorithms that are standa...
114
10.0
KiviPQC-DSA | Post-Quantum Cryptography (PQC) - Digital Signature IP Core (ML-DSA)
The KiviPQC-DSA is an IP core implementing the ML-DSA (Module-Lattice-based Digital Signature Algorithm) a post-quantum cryptographic standard defined...
115
10.0
KiviPQC-KEM | Post-Quantum Cryptography (PQC) - Key Encapsulation IP Core (ML-KEM)
The KiviPQC-KEM is an IP core implementing the ML-KEM (Module-Lattice-based Key Encapsulation Mechanism) a post-quantum cryptographic standard defined...
116
10.0
ML-DSA
The ML-DSA IP Core is a synthesizable SystemVerilog implementation of the FIPS 204 module-lattice digital signature standard. It performs key generati...
117
10.0
Ultra High Performance AES-XTS/ECB Core
The proliferation and expansion of connected devices, connectivity infrastructure, cloud computing, and artificial intelligence is driving for increas...
118
10.0
Ultra High-Performance AES-GCM/CTR IP
The proliferation and expansion of connected devices, connectivity infrastructure, cloud computing, and artificial intelligence is driving for increas...
119
10.0
FortifyIQ High-Performance Quantum-Ready CryptoBox IP Core (AES, HMAC-SHA2, RSA/ECC, PQC) SCA/DPA/FIA-Resistant)
FortifyIQ’s High-Performance Hybrid Crypto Box IP core delivers maximum cryptographic throughput by combining classical asymmetric (RSA, ECC), symmetr...
120
10.0
FortifyIQ's Compact Crypto Box IP Core for Resource-Constrained Devices (AES, ECC/RSA etc.) SCA/DPA/FIA resistant
FortifyIQ’s Crypto Box IP core is a compact, power-efficient cryptographic engine that combines essential asymmetric algorithms (RSA, ECC) with high-s...
121
10.0
Post Quantum ready Public Key Crypto HW acceleration library optimized for networking applications
eSi-PQC-HT is a post quantum ready Public Key Crypto HW acceleration library, optimized for networking applications. eSi-PQC-HT supports the followi...
122
10.0
Post-Quantum SLH-DSA IP Core
The Configurable SLH-DSA IP Core is a portable SystemVerilog implementation of the stateless hash-based digital signature algorithm standardized by NI...
123
10.0
Programmable Mode AES Encryption / Decryption Security Core
The AES-P encryption IP core implements Rijndael encoding and decoding in compliance with the NIST Advanced Encryption Standard. It processes 128-bit ...
124
10.0
tRoot Fx Hardware Secure Modules: Programmable Root of Trust
Synopsys tRoot™ Hardware Secure Modules (HSMs) with Root of Trust enable connected devices to securely and uniquely identify and authenticate themselv...
125
10.0
tRoot Vx Hardware Secure Modules
Synopsys IP tRoot™ Hardware Secure Modules (HSMs) with Root of Trust enable connected devices to securely and uniquely identify and authenticate thems...
126
10.0
True Random Number Generator for NIST SP 800-90c
The security strength of many systems and applications is dependent on the quality of random number generators. Many cryptographic operations require ...
127
10.0
True Random Number Generators
The security strength of many systems and applications is dependent on the quality of random number generators. Many cryptographic operations require ...
128
10.0
Quantum-Driven Hardware Root-of-Trust - Physical Unclonable Function (PUF)
Our patented semiconductor design is the most secure hardware root-of-trust available to create unforgeable device identities and cryptographic keys. ...
129
9.0
TRNG fully compliant with NIST 800-22
The eSi-TRNG is a high quality implementation of a True Random Number Generator fully compliant with latest NIST 800-22. The block uses a standard AM...
130
8.0
Secure Hash Algorithm-3 (SHA-3)
CYB-SHA3 implements Secure Hash Algorithm-3 (SHA-3) family of functions on binary data with the NIST FIPS 202 Standard. It supports cryptographic hash...
131
8.0
Secure-IC's Securyzr™ SM4-GCM Multi-Booster
The SM4-GCM Multi-Booster crypto engine is a scalable implementation of the SM4-GCM algorithm compliant with the standard GBT.32907-2016 published by ...
132
8.0
AES Encoder and Decoder
CYB-AES implements Rijndael cipher encoding and decoding in compliance with the NIST Advanced Encryption Standard. It supports all of the available ke...
133
8.0
AES supporting ECB, CBC and XTS/XEX modes. Includes DMA and AXI interface.
This is a high performance, small footprint crypt/decrypt IP Core. It features up to 8 independent crypt engines. Three DMA engines make sure the cor...
134
8.0
SHA256 Encoder and Decoder
SHA256 is a Secure Hash Algorithms which is one of the latest hash functions standarized by the U.S Federal Government. SHA 256 IP Core Algorithm impl...
135
8.0
FortifyIQ's Secure Hybrid Crypto Box IP Core with Classical and Post-Quantum Cryptography for Embedded Systems (AES, HMAC-SHA2, ECC/RSA etc., PQC) (SCA,DPA,FIA secure)
FortifyIQ’s Hybrid Crypto Box IP core is a comprehensive, high-efficiency cryptographic solution that combines RSA, ECC, AES, and SHA-2/HMAC with a bu...
136
8.0
CRYSTALS Dilithium core for accelerating NIST FIPS 204 Module Lattice Digital Signature algorithm
eSi-Dilithium is a hardware core for accelerating the high-level operations specified in the NIST FIPS 204 standard. Dilithium is an integral part o...
137
8.0
CRYSTALS Kyber core for accelerating NIST FIPS 203 Key Encapsulation Mechanism
eSi-Kyber is a hardware accelerator core designed to accelerate post-quantum Key Encapsulation Mechanism (KEM) as defined by NIST FIPS 203. Kyber, a...
138
7.0
MACsec 10G/25G
Comcores MACsec IP provides Ethernet Layer 2 Security for port authentication, data confidentiality and data integrity as standardized in IEEE 802.1AE...
139
7.0
Falcon IP Core
Falcon IP Core is a post-quantum digital signature algorithm (DSA). It is currently under development. It is going to be compliant with Falcon specifi...
140
7.0
ECDSA IP Core
ECDSA IP Cores perform digital signature generation and verification in compliance with the Elliptic Curve Digital Signature Algorithm (ECDSA) specifi...
141
7.0
Keccak IP Core
The Keccak IP core supports Keccak-based hash functions, including the SHA3 and SHAKE families. It is fully compliant with the NIST's SHA3 standard an...
142
7.0
Generic Polar FEC Codec
Creonic has flexible Polar decoder architecture to fulfil different customer requirements. The IP core has been demonstrated on internal conferenc...
143
7.0
AES GCM IP Core
AES GCM IP Core is a Secure Symmetric Block Cipher IP Core that has compliance with the Advanced Encryption Standard (AES) specification in "FIPS 197"...
144
7.0
AES IP Core
AES IP Core is a Secure Symmetric Block Cipher IP Core that has compliance with the Advanced Encryption Standard (AES) specification in "FIPS 197". Th...
145
7.0
SHA3 IP Core
SHA3 IP Cores perform cryptographic hashing in compliance with the SHA-3 (Secure Hash Algorithm 3) specifications defined in 'FIPS 202'. This standard...
146
7.0
Dilithium IP Core
Dilithium IP Core is a post-quantum digital signature algorithm (DSA). It currently supports Sign and Verify functions, with key generation functional...
147
7.0
Poly IP Core
The Poly IP core supports the polynomial arithmetic required by lattice-based cryptography algorithms, including NIST’s selected Post-Quantum Cryptogr...
148
7.0
PQC Co-Proc IP Core
PQC Co-Proc IP core is a co-processor that supports NIST’s selected Post-Quantum Cryptography (PQC) standards, ML-KEM (Kyber), ML-DSA (Dilithium), SLH...
149
7.0
PQC HW/SW IP Core
PQC HW/SW IP Suite is composed of three dedicated HW IP cores (PolyCore, KeccakCore, MaskCore) and the software stack leveraging these IP cores to imp...
150
7.0
DRBG IP Core
DRBG IP Cores perform deterministic random bit generation in compliance with the standards and guidelines defined in 'NIST SP 800-90A'. This standard ...