Design & Reuse
arrow AES Encryption Core (96)
arrow Cryptography (190)
arrow Data Integrity - Error Correction (18)
arrow Embedded Security Modules (18)
arrow Hardware Accelerator (42)
arrow MACsec, IPsec (33)
arrow Post-Quantum Solutions (34)
arrow PUF Based (20)
arrow Random Number Generator (RNG) (17)
arrow Root of Trust (21)
arrow Security Platform (38)
arrow Sensors & Monitors (9)
536 IP
101
15.5556
Cryptography Accelerator
FPGA IP core implementation of a various cryptographic algorithms, including new, post-quantum standards, available as customizable cryptographic acce...
102
15.5556
Customizable cryptographic accelerator
FPGA IP core implementation of a various cryptographic algorithms, including new, post-quantum standards, available as customizable cryptographic acce...
103
15.0
SHA-3 Secure Hash Function Core
The SHA-3 is a high-throughput, area-efficient hardware accelerator for the SHA-3 cryptographic hashing functions, compliant to NIST’s FIPS 180-4 and ...
104
12.0
AES - XTS for Storage Encrypt/Decrypt Core
The AES-XTS encryption IP core implements encryption/decryption for sector-based storage data. It uses the AES block cypher, in compliance with the NI...
105
11.0
CC-100IP-PI Power Integrity Enhancement IP
The CC-100IP-PI on Chip IP Block is an on-chip adjustable Impedance Controlled Hyper- capacitor with a Capacitance Multiplication, Series Inductance N...
106
11.0
CC-100IP-RF Analog and RF Sensitivity Enhancement IP
The CC-100IP-RF is a RF and Analog Frontend Sensitivity Enhancement IP Block that embeds a Hyper-Capacitor with a Capacitance Multiplication, Series I...
107
10.0
32-bit Public Key Accelerator
Public key cryptography requires complex mathematical operations on very large numbers (from 160 to 4096 bits, or more). The majority of embedded CPUs...
108
10.0
128-bit Public Key Accelerator
Public key cryptography requires complex mathematical operations on very large numbers (from 160 to 4096 bits, or more). The majority of embedded CPUs...
109
10.0
MACsec Protocol Engine for 10/100/1000 Ethernet
The MAC-SEC-1G IP core implements a compact and configurable custom-hardware protocol engine for the IEEE 802.1AE (MACsec) standard. It supports all c...
110
10.0
Secure Boot Software Development Kit
Secure boot enhances the security of an embedded system by cryptographically verifying that the code being loaded and executed is authentic and has no...
111
10.0
Secure Hash Algorithm 256 IP Core
A universal solution that effectively accelerates the SHA2-256 hash function conforming with FIPS PUB 180-4 is the SHA2-256 bridge to APB, AHB, and AX...
112
10.0
Secure-IC's Securyzr™ ChaCha20-Poly1305 Crypto Engine
The ChaCha20-Poly1305 Crypto Engine is RFC7539 compliant to provide Authenticated Encryption with Associated Data (AEAD) using the ChaCha20 stream cip...
113
10.0
Secure-IC's Securyzr™ Deterministic Random Bit Generator (DRBG)
The Deterministic Random Bit Generator is an essential silicon-proven digital IP core for all FPGA, ASIC and SoC designs that targets cryptographicall...
114
10.0
Secure-IC's Securyzr™ Inline Decrypter IP Core
The Inline Decrypter IP Core enables on-the-fly execution of encrypted code from Flash. It is often used to protect the source code from decompiling o...
115
10.0
Secure-IC's Securyzr™ SHA-3 Crypto Engine
The SHA-3 crypto engine has integrated flexibility and scalability to allow for high throughput and a configurable number of hashing rounds per clock ...
116
10.0
Security Protocol Accelerator for SM3 and SM4
SM3 and SM4 are commercial cryptographic standards issued and regulated by the Chinese Office of State Commercial Cryptography Administration (OSCCA)...
117
10.0
Performance-efficient, ultra-low power, compact ARC SEM security processors help protect against logical, hardware, physical and side-channel attacks
The Synopsys ARC® SEM Family of performance-efficient, ultra-low power, compact security processors enables designers to integrate security into their...
118
10.0
Agile Secure Element
Our Agile Secure Element IP provides designers with the flexibility to customise security features according to specific application requirements with...
119
10.0
SHA-3 Crypto Engine
The SHA-3 (secure hash algorithms) crypto engine is a hardware accelerator for cryptographic hashing functions. It is an area efficient and high throu...
120
10.0
Digital Physical Unclonable Function (PUF) IP
Our Digital PUF IP is a digital version of our quantum-based PUF IP (see QDID). The Logic-based Digital PUF IP is a strong hardware root-of-trust for ...
121
10.0
Ultra High Performance AES-XTS/ECB Core
The proliferation and expansion of connected devices, connectivity infrastructure, cloud computing, and artificial intelligence is driving for increas...
122
10.0
Ultra High-Performance AES-GCM/CTR IP
The proliferation and expansion of connected devices, connectivity infrastructure, cloud computing, and artificial intelligence is driving for increas...
123
10.0
FortifyIQ High-Performance Quantum-Ready CryptoBox IP Core (AES, HMAC-SHA2, RSA/ECC, PQC) SCA/DPA/FIA-Resistant)
FortifyIQ’s High-Performance Hybrid Crypto Box IP core delivers maximum cryptographic throughput by combining classical asymmetric (RSA, ECC), symmetr...
124
10.0
FortifyIQ's Compact Crypto Box IP Core for Resource-Constrained Devices (AES, ECC/RSA etc.) SCA/DPA/FIA resistant
FortifyIQ’s Crypto Box IP core is a compact, power-efficient cryptographic engine that combines essential asymmetric algorithms (RSA, ECC) with high-s...
125
10.0
Post Quantum ready Public Key Crypto HW acceleration library optimized for networking applications
eSi-PQC-HT is a post quantum ready Public Key Crypto HW acceleration library, optimized for networking applications. eSi-PQC-HT supports the followi...
126
10.0
Programmable Mode AES Encrypt/Decrypt Core
The AES-P encryption IP core implements Rijndael encoding and decoding in compliance with the NIST Advanced Encryption Standard. It processes 128-bit ...
127
10.0
tRoot Fx Hardware Secure Modules: Programmable Root of Trust
Synopsys tRoot™ Hardware Secure Modules (HSMs) with Root of Trust enable connected devices to securely and uniquely identify and authenticate themselv...
128
10.0
tRoot Vx Hardware Secure Modules
Synopsys IP tRoot™ Hardware Secure Modules (HSMs) with Root of Trust enable connected devices to securely and uniquely identify and authenticate thems...
129
10.0
True Random Number Generator for NIST SP 800-90c
The security strength of many systems and applications is dependent on the quality of random number generators. Many cryptographic operations require ...
130
10.0
True Random Number Generators
The security strength of many systems and applications is dependent on the quality of random number generators. Many cryptographic operations require ...
131
10.0
Quantum-Driven Hardware Root-of-Trust - Physical Unclonable Function (PUF)
Our patented semiconductor design is the most secure hardware root-of-trust available to create unforgeable device identities and cryptographic keys. ...
132
9.0
TRNG fully compliant with NIST 800-22
The eSi-TRNG is a high quality implementation of a True Random Number Generator fully compliant with latest NIST 800-22. The block uses a standard AM...
133
8.0
HASH Core, providing MD5, SHA1 and SHA256. Includes DMA and AXI Interface
This is a high performance, small footprint HASH IP Core. It supports three HASH algorithms: MD5, SHA1, SHA256. A S/G DMA engine keeps the core runni...
134
8.0
Secure Hash Algorithm-3 (SHA-3)
CYB-SHA3 implements Secure Hash Algorithm-3 (SHA-3) family of functions on binary data with the NIST FIPS 202 Standard. It supports cryptographic hash...
135
8.0
Secure-IC's Securyzr™ SM4-GCM Multi-Booster
The SM4-GCM Multi-Booster crypto engine is a scalable implementation of the SM4-GCM algorithm compliant with the standard GBT.32907-2016 published by ...
136
8.0
AES Encoder and Decoder
CYB-AES implements Rijndael cipher encoding and decoding in compliance with the NIST Advanced Encryption Standard. It supports all of the available ke...
137
8.0
AES supporting ECB, CBC and XTS/XEX modes. Includes DMA and AXI interface.
This is a high performance, small footprint crypt/decrypt IP Core. It features up to 8 independent crypt engines. Three DMA engines make sure the cor...
138
8.0
SHA256 Encoder and Decoder
SHA256 is a Secure Hash Algorithms which is one of the latest hash functions standarized by the U.S Federal Government. SHA 256 IP Core Algorithm impl...
139
8.0
ZLIB compatible compression and decompession, with DMA and AXi interface
This is a high performance, small footprint ZLIB compatible IP Core. It features 3 DMA engines, AXI interconnect and separate clocks for AXI interface...
140
8.0
FortifyIQ's Secure Hybrid Crypto Box IP Core with Classical and Post-Quantum Cryptography for Embedded Systems (AES, HMAC-SHA2, ECC/RSA etc., PQC) (SCA,DPA,FIA secure)
FortifyIQ’s Hybrid Crypto Box IP core is a comprehensive, high-efficiency cryptographic solution that combines RSA, ECC, AES, and SHA-2/HMAC with a bu...
141
8.0
CRYSTALS Dilithium core for accelerating NIST FIPS 204 Module Lattice Digital Signature algorithm
eSi-Dilithium is a hardware core for accelerating the high-level operations specified in the NIST FIPS 204 standard. Dilithium is an integral part o...
142
8.0
CRYSTALS Kyber core for accelerating NIST FIPS 203 Key Encapsulation Mechanism
eSi-Kyber is a hardware accelerator core designed to accelerate post-quantum Key Encapsulation Mechanism (KEM) as defined by NIST FIPS 203. Kyber, a...
143
7.0
MACsec 10G/25G
Comcores MACsec IP provides Ethernet Layer 2 Security for port authentication, data confidentiality and data integrity as standardized in IEEE 802.1AE...
144
7.0
Falcon IP Core
Falcon IP Core is a post-quantum digital signature algorithm (DSA). It is currently under development. It is going to be compliant with Falcon specifi...
145
7.0
ECDSA IP Core
ECDSA IP Cores perform digital signature generation and verification in compliance with the Elliptic Curve Digital Signature Algorithm (ECDSA) specifi...
146
7.0
AES GCM IP Core
AES GCM IP Core is a Secure Symmetric Block Cipher IP Core that has compliance with the Advanced Encryption Standard (AES) specification in "FIPS 197"...
147
7.0
AES IP Core
AES IP Core is a Secure Symmetric Block Cipher IP Core that has compliance with the Advanced Encryption Standard (AES) specification in "FIPS 197". Th...
148
7.0
SHA3 IP Core
SHA3 IP Cores perform cryptographic hashing in compliance with the SHA-3 (Secure Hash Algorithm 3) specifications defined in 'FIPS 202'. This standard...
149
7.0
Dilithium IP Core
Dilithium IP Core is a post-quantum digital signature algorithm (DSA). It currently supports Sign and Verify functions, with key generation functional...
150
7.0
DRBG IP Core
DRBG IP Cores perform deterministic random bit generation in compliance with the standards and guidelines defined in 'NIST SP 800-90A'. This standard ...