Design & Reuse
arrow AES Encryption Core (96)
arrow Cryptography (161)
arrow Data Integrity - Error Correction (28)
arrow Embedded Security Modules (18)
arrow Hardware Accelerator (42)
arrow MACsec, IPsec (31)
arrow Post-Quantum Solutions (27)
arrow PUF Based (24)
arrow Random Number Generator (RNG) (19)
arrow Root of Trust (17)
arrow Security Platform (32)
arrow Sensors & Monitors (11)
506 IP
101
20.0
Secure-IC's Securyzr™ Chacha20-Poly1305 Multi-Booster - 800Gbps
The ChaCha20-Poly1305 Multi-Booster Crypto Engine is RFC7539 compliant to provide Authenticated Encryption with Associated Data (AEAD) using the ChaCh...
102
20.0
Secure-IC's Securyzr™ Memory & Bus Protection IP Core
The Memory & Bus Protection IP Core module enables on-the-fly encryption/decryption and authentication to the external memory. It supports AHB/AXI sl...
103
20.0
AES-XTS encryption/decryption IP
SphinX is designed to accommodate the speed, latency and throughput requirements of high performance computer systems main memory / DRAM. The IP imple...
104
20.0
High capacity post-quantum cryptography processor
PQPerform-Lattice is a powerful hardware-based product designed for high throughput, high-performance, and high speed. It adds post-quantum cryptograp...
105
20.0
High-Performance AES-GCM/CTR IP
The compact, high-performance Synopsys Pipelined AES-GCM/CTR Core implements the AES-GCM/CTR algorithm as specified in the National Institute of Stand...
106
20.0
High-Performance AES-XTS/ECB IP
Memory and storage security involves protecting storage resources and the data stored on them, both on-premises and in external data centers and the c...
107
20.0
FIPS 140-3 CAVP-compliant, compact hardware PQC engine
PQPlatform-Lattice is a compact FIPS 140-3 CAVP-compliant, PQC engine that adds post-quantum support for hardware components and embedded devices, usi...
108
20.0
Ultra-fast, compact, power-efficient secure hash acceleration
PQPlatform-Hash is a power side-channel accelerator, supporting a wide range of Hash-Based Signature Schemes (HBSS). PQPlatform-Hash deploys tried-and...
109
20.0
Fully autonomous, FIPS 140-3 CAVP-ready PQC subsystem
PQPlatform-SubSys is a cryptographic subsystem, designed to provide offloaded cryptographic services with minimal integration effort and full autonomy...
110
20.0
Multipurpose Security Protocol Accelerator
Complex system-on-chip (SoC) requirements can include security at the MAC layer, VPN layer, and application layer. The SynopsysSecurity Protocol Accel...
111
19.0
Hardware Security Module (HSM)
The HSM IP module is a Hardware Security Module for a wide range of applications. It is developed, validated and licensed by Secure-IC (partner of Xil...
112
15.5556
Hardware Security Platform
Our FPGA based Hardware Security Modules are offered both as IP Core and as a separate chip. The Enhanced Hardware Security Modules is extension of th...
113
15.5556
Trusted Platform Modules
Our FPGA based Trusted Platform Modules are offered both as IP Core and as a separate chip. We offer two types of TPM:Regular Trusted Platform Modules...
114
15.5556
Cryptography Accelerator
FPGA IP core implementation of a various cryptographic algorithms, including new, post-quantum standards, available as customizable cryptographic acce...
115
15.5556
Customizable cryptographic accelerator
FPGA IP core implementation of a various cryptographic algorithms, including new, post-quantum standards, available as customizable cryptographic acce...
116
15.0
Advanced HMAC SHA2 DPA- and FIA-Resistant Software Library
The FortiMac library belongs to the FortiMac product family. This software library provides ultra-strong protection against SCA, FIA, and cache attack...
117
15.0
SHA-3 Secure Hash Function Core
The SHA-3 is a high-throughput, area-efficient hardware accelerator for the SHA-3 cryptographic hashing functions, compliant to NIST’s FIPS 180-4 and ...
118
12.0
AES-XTS for Storage Encrypt/Decrypt Core
The AES-XTS encryption IP core implements encryption/decryption for sector-based storage data. It uses the AES block cypher, in compliance with the NI...
119
11.0
CC-100IP-PI Power Integrity Enhancement IP
The CC-100IP-PI on Chip IP Block is an on-chip adjustable Impedance Controlled Hyper- capacitor with a Capacitance Multiplication, Series Inductance N...
120
11.0
CC-100IP-RF Analog and RF Sensitivity Enhancement IP
The CC-100IP-RF is a RF and Analog Frontend Sensitivity Enhancement IP Block that embeds a Hyper-Capacitor with a Capacitance Multiplication, Series I...
121
10.0
32-bit Public Key Accelerator
Public key cryptography requires complex mathematical operations on very large numbers (from 160 to 4096 bits, or more). The majority of embedded CPUs...
122
10.0
128-bit Public Key Accelerator
Public key cryptography requires complex mathematical operations on very large numbers (from 160 to 4096 bits, or more). The majority of embedded CPUs...
123
10.0
MACsec Protocol Engine for 10/100/1000 Ethernet
The MAC-SEC-1G IP core implements a compact and configurable custom-hardware protocol engine for the IEEE 802.1AE (MACsec) standard. It supports all c...
124
10.0
Secure Boot Software Development Kit
Secure boot enhances the security of an embedded system by cryptographically verifying that the code being loaded and executed is authentic and has no...
125
10.0
Secure Hash Algorithm 256 IP Core
A universal solution that effectively accelerates the SHA2-256 hash function conforming with FIPS PUB 180-4 is the SHA2-256 bridge to APB, AHB, and AX...
126
10.0
Secure-IC's Securyzr™ ChaCha20-Poly1305 Crypto Engine
The ChaCha20-Poly1305 Crypto Engine is RFC7539 compliant to provide Authenticated Encryption with Associated Data (AEAD) using the ChaCha20 stream cip...
127
10.0
Secure-IC's Securyzr™ Deterministic Random Bit Generator (DRBG)
The Deterministic Random Bit Generator is an essential silicon-proven digital IP core for all FPGA, ASIC and SoC designs that targets cryptographicall...
128
10.0
Secure-IC's Securyzr™ Inline Decrypter IP Core
The Inline Decrypter IP Core enables on-the-fly execution of encrypted code from Flash. It is often used to protect the source code from decompiling o...
129
10.0
Secure-IC's Securyzr™ SHA-3 Crypto Engine
The SHA-3 crypto engine has integrated flexibility and scalability to allow for high throughput and a configurable number of hashing rounds per clock ...
130
10.0
Security Protocol Accelerator for SM3 and SM4
SM3 and SM4 are commercial cryptographic standards issued and regulated by the Chinese Office of State Commercial Cryptography Administration (OSCCA)...
131
10.0
Reed Solomon Forward Error Correction Encoder Decoder
The Reed Solomon Forward Error Correction (RS FEC) IP is a highly optimized and silicon agnostic implementation of the RS FEC encoder and decoder algo...
132
10.0
Performance-efficient, ultra-low power, compact ARC SEM security processors help protect against logical, hardware, physical and side-channel attacks
The Synopsys ARC® SEM Family of performance-efficient, ultra-low power, compact security processors enables designers to integrate security into their...
133
10.0
AES Encrypt/Decrypt 128/192/256
Low Latency, Low power, low footprint 128/192/256 bit AES Encryption / Decryption...
134
10.0
Agile Secure Element
Our Agile Secure Element IP provides designers with the flexibility to customise security features according to specific application requirements with...
135
10.0
SHA-3 Crypto IP Core
The SHA-3 – secure hash algorithms – crypto engine is a hardware accelerator for cryptographic hashing functions. It is an area efficient and high thr...
136
10.0
Digital Physical Unclonable Function (PUF) IP
Our Digital PUF IP is a digital version of our quantum-based PUF IP (see QDID). The Logic-based Digital PUF IP is a strong hardware root-of-trust for ...
137
10.0
Clock Attack Monitor for Tamper Detection
The agileCAM is a Ring Oscillator (RO) based clock attack monitor designed to detect clock attacks due to violation of the set-up time requirements of...
138
10.0
Ultra High Performance AES-XTS/ECB Core
The proliferation and expansion of connected devices, connectivity infrastructure, cloud computing, and artificial intelligence is driving for increas...
139
10.0
Ultra High-Performance AES-GCM/CTR IP
The proliferation and expansion of connected devices, connectivity infrastructure, cloud computing, and artificial intelligence is driving for increas...
140
10.0
Post Quantum ready Public Key Crypto HW acceleration library optimized for networking applications
eSi-PQC-HT is a post quantum ready Public Key Crypto HW acceleration library, optimized for networking applications. eSi-PQC-HT supports the followi...
141
10.0
DPA and FIA-resistant Ultra-Compact FortiCrypt AES IP core
Intro The AES UC-DPA-FIA IP Core belongs to the FortiCrypt product family. Like all the FortiCrypt product family members, this IP provides the highes...
142
10.0
DPA- and FIA-Resistant Balanced FortiCrypt AES IP Core
Intro The AES SX-DPA-FIA IP Core is a part of the FortiCrypt product family. It provides a balanced solution with a gate count comparable to unprotect...
143
10.0
tRoot Fx Hardware Secure Modules: Programmable Root of Trust
Synopsys tRoot™ Hardware Secure Modules (HSMs) with Root of Trust enable connected devices to securely and uniquely identify and authenticate themselv...
144
10.0
tRoot Vx Hardware Secure Modules
Synopsys IP tRoot™ Hardware Secure Modules (HSMs) with Root of Trust enable connected devices to securely and uniquely identify and authenticate thems...
145
10.0
True Random Number Generator for NIST SP 800-90c
The security strength of many systems and applications is dependent on the quality of random number generators. Many cryptographic operations require ...
146
10.0
True Random Number Generators
The security strength of many systems and applications is dependent on the quality of random number generators. Many cryptographic operations require ...
147
10.0
Quantum-Driven Hardware Root-of-Trust - Physical Unclonable Function (PUF)
Our patented semiconductor design is the most secure hardware root-of-trust available to create unforgeable device identities and cryptographic keys. ...
148
9.0
TRNG fully compliant with NIST 800-22
The eSi-TRNG is a high quality implementation of a True Random Number Generator fully compliant with latest NIST 800-22. The block uses a standard AM...
149
8.0
HASH Core, providing MD5, SHA1 and SHA256. Includes DMA and AXI Interface
This is a high performance, small footprint HASH IP Core. It supports three HASH algorithms: MD5, SHA1, SHA256. A S/G DMA engine keeps the core runni...
150
8.0
Secure Hash Algorithm-3 (SHA-3)
CYB-SHA3 implements Secure Hash Algorithm-3 (SHA-3) family of functions on binary data with the NIST FIPS 202 Standard. It supports cryptographic hash...